From: Jani Nurminen <jani.nurmi...@windriver.com>
When PCIe has been set up by the bootloader, the ecam_size field in the
E_ECAM_CONTROL register already contains a value.
The Xilinx implementation used to be value 0xc (for 16 busses; 16 MB) in
kernel 5.10, but now in kernel 6.1 the value was bumped to 0x10 (for 256
busses; 256 MB). The bumping happened in commit 09f9f357fe8b ("PCI:
xilinx-nwl: Increase ECAM size to accommodate 256 buses").
When U-boot programmed in ecam_size value as 0xc, the driver ORred the
new maximal value without doing a proper RMW sequence. As a result, the
ecam_size became 0xc | 0x10 = 0x1c, which is beyond the ecam_max_size
limit of 0x10 (from E_ECAM_CAPABILITIES).
Clear the ecam_size field before writing it, to ensure the new maximum
value is written without surprises.
Fixes: ab597d35ef11 ("PCI: xilinx-nwl: Add support for Xilinx NWL PCIe Host
Controller")
Signed-off-by: Jani Nurminen <jani.nurmi...@windriver.com>
Signed-off-by: Kai Kang <kai.k...@windriver.com>
---
Hi Bruce,
Would you like to merge this commit to branches:
v6.1/standard/preempt-rt/sdkv6.1/xlnx-soc
v6.1/standard/sdkv6.1/xlnx-soc
Thanks,
Kai
drivers/pci/controller/pcie-xilinx-nwl.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c
b/drivers/pci/controller/pcie-xilinx-nwl.c
index f56516669960..13585a5ac698 100644
--- a/drivers/pci/controller/pcie-xilinx-nwl.c
+++ b/drivers/pci/controller/pcie-xilinx-nwl.c
@@ -673,9 +673,10 @@ static int nwl_pcie_bridge_init(struct nwl_pcie *pcie)
nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, E_ECAM_CONTROL) |
E_ECAM_CR_ENABLE, E_ECAM_CONTROL);
- nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, E_ECAM_CONTROL) |
- (NWL_ECAM_MAX_SIZE << E_ECAM_SIZE_SHIFT),
- E_ECAM_CONTROL);
+ ecam_val = nwl_bridge_readl(pcie, E_ECAM_CONTROL);
+ ecam_val &= ~E_ECAM_SIZE_LOC;
+ ecam_val |= NWL_ECAM_MAX_SIZE << E_ECAM_SIZE_SHIFT;
+ nwl_bridge_writel(pcie, ecam_val, E_ECAM_CONTROL);
nwl_bridge_writel(pcie, lower_32_bits(pcie->phys_ecam_base),
E_ECAM_BASE_LO);
--
2.47.0.148.g6a11438f43
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