On 3/24/15 4:47 PM, Saul Wold wrote: > Add PINCTRL_CHERRYVIEW and PINCTRL_BAYTRAIL here since more devices will > have PINCTRL for SoC and GPIO pins > > Signed-off-by: Saul Wold <[email protected]>
Acked-by: Darren Hart <[email protected]> > --- > meta/cfg/kernel-cache/features/intel-pinctrl/intel-pinctrl.cfg | 3 +++ > meta/cfg/kernel-cache/features/intel-pinctrl/intel-pinctrl.scc | 5 +++++ > 2 files changed, 8 insertions(+) > create mode 100644 > meta/cfg/kernel-cache/features/intel-pinctrl/intel-pinctrl.cfg > create mode 100644 > meta/cfg/kernel-cache/features/intel-pinctrl/intel-pinctrl.scc > > diff --git a/meta/cfg/kernel-cache/features/intel-pinctrl/intel-pinctrl.cfg > b/meta/cfg/kernel-cache/features/intel-pinctrl/intel-pinctrl.cfg > new file mode 100644 > index 0000000..38f2359 > --- /dev/null > +++ b/meta/cfg/kernel-cache/features/intel-pinctrl/intel-pinctrl.cfg > @@ -0,0 +1,3 @@ > + > +CONFIG_PINCTRL_BAYTRAIL=y > +CONFIG_PINCTRL_CHERRYVIEW=y > diff --git a/meta/cfg/kernel-cache/features/intel-pinctrl/intel-pinctrl.scc > b/meta/cfg/kernel-cache/features/intel-pinctrl/intel-pinctrl.scc > new file mode 100644 > index 0000000..179e1db > --- /dev/null > +++ b/meta/cfg/kernel-cache/features/intel-pinctrl/intel-pinctrl.scc > @@ -0,0 +1,5 @@ > +define KFEATURE_DESCRIPTION "Enable PINCTRL for Intel SOCs" > +define KFEATURE_COMPATIBILITY board > + > +kconf hardware intel-pinctrl.cfg > + > -- Darren Hart Intel Open Source Technology Center -- _______________________________________________ linux-yocto mailing list [email protected] https://lists.yoctoproject.org/listinfo/linux-yocto
