From: John Jacques <john.jacq...@intel.com>
Signed-off-by: John Jacques <john.jacq...@intel.com>
---
drivers/net/ethernet/lsi/lsi-femac.c | 53 ++++++------------------------------
1 file changed, 9 insertions(+), 44 deletions(-)
diff --git a/drivers/net/ethernet/lsi/lsi-femac.c
b/drivers/net/ethernet/lsi/lsi-femac.c
index 2b73e09..78717e0 100644
--- a/drivers/net/ethernet/lsi/lsi-femac.c
+++ b/drivers/net/ethernet/lsi/lsi-femac.c
@@ -339,7 +339,7 @@ queue_inc_tail(struct queue_ptr *q)
static inline void
pr_queue(const char *tag, const struct queue_ptr *q)
{
- pr_debug("%s tail=%d.%lu hw_tail=%d.%lu head=%d.%lu\n",
+ pr_debug("%s tail=%d.%d hw_tail=%d.%d head=%d.%d\n",
tag,
dmaptr_gen(q->tail), dmaptr_idx(q->tail),
dmaptr_gen(q->hw_tail), dmaptr_idx(q->hw_tail),
@@ -460,7 +460,7 @@ femac_show_counters(struct device *dev,
priv->counters.tx_nobuf);
n += snprintf(&buf[n], PAGE_SIZE,
- "rx_queue: %u.%lu / %u.%lu / %u.%lu\n",
+ "rx_queue: %u.%u / %u.%u / %u.%u\n",
dmaptr_gen(priv->rxq->tail),
dmaptr_idx(priv->rxq->tail),
dmaptr_gen(le32_to_cpu(priv->rxq->hw_tail)),
@@ -469,7 +469,7 @@ femac_show_counters(struct device *dev,
dmaptr_idx(priv->rxq->head));
n += snprintf(&buf[n], PAGE_SIZE,
- "tx_queue: %u.%lu / %u.%lu / %u.%lu\n",
+ "tx_queue: %u.%u / %u.%u / %u.%u\n",
dmaptr_gen(priv->txq->tail),
dmaptr_idx(priv->txq->tail),
dmaptr_gen(le32_to_cpu(priv->txq->hw_tail)),
@@ -535,24 +535,8 @@ alloc_rx_buf(struct femac_dev *priv, struct dma_desc *d)
d->flags = cpu_to_le32(DMADESC_WRITE | DMADESC_INTR);
d->buf_len = cpu_to_le16(MAX_FRAME_SIZE);
d->pdu_len = d->buf_len;
-
- /*
- The FEMAC hardware can only DMA to the lower 32 bits. If
- the dma_addr is higher, fail.
- */
-
- BUG_ON(0x100000000 <= dma_addr);
d->buf_ptr = cpu_to_le32((u32)dma_addr);
-
- /*
- The skb address will be greater than 32 bits. The receive
- routine below will assume that the top 32 bits are
- 0xffffffc0. Verify that here.
- */
-
- BUG_ON(0xffffffc000000000 != ((u64)skb & 0xffffffff00000000));
d->cookie = (u32)skb;
-
return 0;
}
@@ -565,7 +549,7 @@ femac_tx_complete(struct femac_dev *priv)
spin_lock_irqsave(&priv->lock, flags);
while ((desc = queue_get_tail(priv->tx_ring, priv->txq)) != NULL) {
- void *buf = (void *)(desc->cookie | 0xffffffc000000000);
+ void *buf = (void *)desc->cookie;
dma_pool_free(priv->tx_pool, buf, le32_to_cpu(desc->buf_ptr));
queue_inc_tail(priv->txq);
@@ -596,7 +580,6 @@ femac_rx_packets(struct femac_dev *priv, int max)
while (num_rx < max) {
desc = queue_get_tail(priv->rx_ring, priv->rxq);
-
if (!desc)
break;
queue_inc_tail(priv->rxq);
@@ -611,7 +594,7 @@ femac_rx_packets(struct femac_dev *priv, int max)
dma_unmap_single(priv->dev, le32_to_cpu(desc->buf_ptr),
MAX_FRAME_SIZE, DMA_FROM_DEVICE);
- skb = (struct sk_buff *)(desc->cookie | 0xffffffc000000000);
+ skb = (struct sk_buff *)desc->cookie;
if (!(le32_to_cpu(desc->flags) & DMADESC_ERROR)) {
struct ethhdr *ethhdr = (struct ethhdr *)skb->data;
@@ -743,14 +726,6 @@ femac_open(struct net_device *ndev)
}
phy_dev->advertising = phy_dev->supported;
- phy_dev->supported &=
- ~(SUPPORTED_10baseT_Full |
- SUPPORTED_100baseT_Half |
- SUPPORTED_100baseT_Full);
- phy_dev->advertising &=
- ~(SUPPORTED_10baseT_Full |
- SUPPORTED_100baseT_Half |
- SUPPORTED_100baseT_Full);
priv->link = 0;
priv->phy_dev = phy_dev;
@@ -827,7 +802,7 @@ femac_hard_start_xmit(struct sk_buff *skb, struct
net_device *ndev)
goto drop;
}
- tx_buf = dma_pool_alloc(priv->tx_pool, GFP_ATOMIC|GFP_DMA32, &dma_addr);
+ tx_buf = dma_pool_alloc(priv->tx_pool, GFP_ATOMIC, &dma_addr);
if (!tx_buf) {
netif_stop_queue(ndev);
DBG_INC(priv, tx_nobuf);
@@ -1003,16 +978,8 @@ femac_init(struct net_device *ndev)
writel(RX_MODE_ETHERNET_ENABLE, priv->base + RXREG_MODE);
writel(0x0, priv->base + TXREG_SOFT_RESET);
writel(TX_MODE_ETHERNET_ENABLE, priv->base + TXREG_MODE);
-#if 1
- /*
- The watermark register is different in emulation AND needs a
- different value
- */
- writel(0x7f007f, priv->base + TXREG_WATERMARK);
-#else
writel(TX_WATERMARK_DTPA_HIGH(96) | TX_WATERMARK_DTPA_LOW(10),
priv->base + TXREG_WATERMARK);
-#endif
writel(DMA_CTRL_ERR_CLEAR | DMA_CTRL_ENABLE,
priv->base + DMAREG_CONTROL);
@@ -1027,10 +994,9 @@ femac_init(struct net_device *ndev)
/* Initialize RX queue */
priv->rx_ring_size = priv->rx_num_desc * sizeof(struct dma_desc);
priv->rx_ring = dma_alloc_coherent(&ndev->dev, priv->rx_ring_size,
- &priv->rx_ring_phys,
- GFP_KERNEL|GFP_DMA32);
+ &priv->rx_ring_phys, GFP_KERNEL);
priv->rxq = dma_alloc_coherent(&ndev->dev, 2 * sizeof(struct queue_ptr),
- &dma_phys, GFP_KERNEL|GFP_DMA32);
+ &dma_phys, GFP_KERNEL);
priv->rxq->phys = dma_phys;
writel(priv->rx_ring_phys, priv->base + DMAREG_RX_QUEUE_BASE);
writel(priv->rx_ring_size/1024, priv->base + DMAREG_RX_QUEUE_SIZE);
@@ -1053,8 +1019,7 @@ femac_init(struct net_device *ndev)
/* Initialize TX queue */
priv->tx_ring_size = priv->tx_num_desc * sizeof(struct dma_desc);
priv->tx_ring = dma_alloc_coherent(&ndev->dev, priv->tx_ring_size,
- &priv->tx_ring_phys,
- GFP_KERNEL|GFP_DMA32);
+ &priv->tx_ring_phys, GFP_KERNEL);
priv->txq = &priv->rxq[1];
priv->txq->phys = dma_phys + sizeof(struct queue_ptr);
writel(priv->tx_ring_phys, priv->base + DMAREG_TX_QUEUE_BASE);
--
1.9.1
--
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