Hi, These three patches fix the "i915 DDI PHY state mismatch" errors in display runtime power management paths. The patches are cherry-picked from the upstream kernel. The patches are for bxt-rebase brach and tested on Joule.
95a7a2a drm/i915/bxt: Set DDI PHY lane latency optimization during modeset 67856d4 drm/i915/bxt: Use PHY0 GRC value for HW state verification d4d6279 drm/i915: Set crtc_state->lane_count for HDMI Ander Conselvan de Oliveira (1): drm/i915: Set crtc_state->lane_count for HDMI Imre Deak (2): drm/i915/bxt: Set DDI PHY lane latency optimization during modeset drm/i915/bxt: Use PHY0 GRC value for HW state verification drivers/gpu/drm/i915/intel_ddi.c | 129 +++++++++++++++++++++++------------ drivers/gpu/drm/i915/intel_display.c | 5 ++ drivers/gpu/drm/i915/intel_drv.h | 6 ++ drivers/gpu/drm/i915/intel_hdmi.c | 4 ++ 4 files changed, 99 insertions(+), 45 deletions(-) -- 2.7.4 -- _______________________________________________ linux-yocto mailing list [email protected] https://lists.yoctoproject.org/listinfo/linux-yocto
