From: Rodrigo Vivi <[email protected]>
commit bf9a496a1fa434670285bd592c75d009cbb99720 upstream.
The workaround added in
commit c6782b76d31a ("drm/i915/gen9: Reset secondary power well
equests left on by DMC/KVMR")
needs to be applied on Cannonlake as well.
So let's assume any platform using this power well setup
will also need and let's just go ahead and remove if condition.
Cc: Imre Deak <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Reviewed-by: Imre Deak <[email protected]>
Link:
http://patchwork.freedesktop.org/patch/msgid/[email protected]
Signed-off-by: Liwei Song <[email protected]>
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 0b3cacd29bac..8a6f287d225b 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -853,8 +853,7 @@ static void skl_set_power_well(struct drm_i915_private
*dev_priv,
DRM_DEBUG_KMS("Disabling %s\n", power_well->name);
}
- if (IS_GEN9(dev_priv))
- gen9_sanitize_power_well_requests(dev_priv, power_well);
+ gen9_sanitize_power_well_requests(dev_priv, power_well);
}
if (wait_for(!!(I915_READ(HSW_PWR_WELL_DRIVER) & state_mask) == enable,
--
2.7.4
--
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