Hi,
On 10/14/19 2:07 PM, Michal Simek wrote:
On 13. 10. 19 15:33, quanyang.w...@windriver.com wrote:
From: Quanyang Wang <quanyang.w...@windriver.com>
When using i2c_smbus_read_byte_data to read one byte from a
slave device, because of the commit d358def70688
("i2c: cadence: Fix the hold bit setting"), the transaction becomes:
S Addr Wr [A] Comm [A] P S Addr Rd [A] [Data] NA P
^
CR_HOLD bit as 0
This will result that the read operation fails and will read "0xff" from
the slave device. In the SMBus protocol stipulates that it must follow that
command with a repeated START condition as below:
S Addr Wr [A] Comm [A] Sr Addr Rd [A] [Data] NA P
So keep CR_HOLD bit to be 1 to make sure that the read operation begins
with a Sr (repeated START) but not a STOP followed by START.
Signed-off-by: Quanyang Wang <quanyang.w...@windriver.com>
---
drivers/i2c/busses/i2c-cadence.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-cadence.c b/drivers/i2c/busses/i2c-cadence.c
index 6b011931e090..d9493914be15 100644
--- a/drivers/i2c/busses/i2c-cadence.c
+++ b/drivers/i2c/busses/i2c-cadence.c
@@ -626,8 +626,6 @@ static void cdns_i2c_mrecv(struct cdns_i2c *id)
*/
if ((id->recv_count > CDNS_I2C_FIFO_DEPTH) || id->bus_hold_flag)
ctrl_reg |= CDNS_I2C_CR_HOLD;
- else
- ctrl_reg = ctrl_reg & ~CDNS_I2C_CR_HOLD;
cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET);
Shubhrajyoti: Can you please comment?
Any comment?
M
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