On Thu, 2011-12-15 at 17:49 +0000, Julius Baxter wrote: > In the reset vector currently in the kernel ( > http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob_plain;f=arch/openrisc/kernel/head.S;hb=HEAD > ) I see this: > > /* ---[ 0x100: RESET exception ]----------------------------------------- */ > .org 0x100 > /* Jump to .init code at _start which lives in the .head section > * and will be discarded after boot. > */ > LOAD_SYMBOL_2_GPR(r4, _start) > tophys (r3,r4) /* MMU disabled */ > l.jr r3 > l.nop > > Which does not appear to clear registers at reset.
Keep reading... what does _start do? Exactly... it starts by clearing registers!!! The problem, perhaps, is that the register clear is assuming that r0 really is 0...??? Perhaps the first thing we should be doing is loading r0 with a 0: l.movhi r0,hi(0) l.ori r0,r0,0 I haven't seen or heard about this issue before... why is this suddenly a problem for you? > I recall a discussion about this a while back, about whether hardware > should clear them at reset or not (in a synthesisable manner.) > > From what I can see in the OpenRISC 1000 architecture manual from the > section on GPRs: > > An implementation is not required to initialize GPRs to zero > during the reset > procedure. The reset exception handler is responsible for > initializing GPRs to zero if that > is necessary. > Agreed on this point... the registers need to be cleared in SW, not hardware. > The sections on the TLB match registers shows them as having 'X' at > reset (therefore not initialised by RTL) and should be probably be > initialised by software. > > The cache shouldn't be an issue - all implementations I've seen clear > the thing before it's turned on. > > So I think the correct patch to be submitting would be one to the > kernel port and not one for the processor RTL. Agreed on all points here, too! /Jonas
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