On Fri, 2012-03-02 at 07:49 +0100, Geert Uytterhoeven wrote: > On Fri, Mar 2, 2012 at 07:11, Jonas Bonn <[email protected]> wrote: > So OpenRISC is big endian, which matches > arch/openrisc/include/asm/byteorder.h:#include <linux/byteorder/big_endian.h> > > However, there are some remainings of little endian support: > arch/openrisc/include/asm/unaligned.h:#if defined(__LITTLE_ENDIAN) > arch/openrisc/include/asm/unaligned.h:#elif defined(__BIG_ENDIAN) > arch/openrisc/include/asm/unaligned.h:# error need to define endianess
Technically OpenRISC can be either big or little endian, but there is no publically available little-endian implementation... yet. There's a proprietary little-endian implementation, but they're not running Linux. Anyway, that's the reason for starting to cater for both endianesses. > > > Since 'location' points at the 32-bit instruction in question, that cast > > is supposed to be saying: 'move 16 bit value into low 16 bits of > > instruction'. > > It may be more readable and safer (w.r.t. changing endianness) to do > 32-bit loads and stores and explicitly modify the 16 LSB. Agreed. It's probably a bit too clever that way it's written now. /Jonas
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