On Sun, Jul 28, 2013 at 10:16:16AM -0700, Sebastian Macke wrote: > I would suggest to enable this hardware tlb refill by bit 17 in the > supervision register SR and not by a zero or nonzero DMMUCR or IMMUCR > register. Then it would be more consistent with the specification to > control such a feature. >
I have no strong feelings against or for having a flag in SR, xMMUCR or treating xMMUCR[31:10] == 0 as tlb miss fallback. Perhaps the last is the least intrusive to the arch spec, but I can't see any of them breaking anything. What do others think about this? Stefan _______________________________________________ Linux mailing list Linux@lists.openrisc.net http://lists.openrisc.net/listinfo/linux
