Hi Dmitry,
On 02/10/2014 02:45 PM, Dmitry Kalinkin wrote:
> The bug was introduced in d23b5799b608112bb799c9b0e1e11ee1da692d76
> OpenRISC 1000 Architecture Manual specifies mask values to be 1 for
> enabled interrupt and 0 for disabled. or1200 complies to the spec here,
> so, in non-or1200 case, mask value should not be generated in some
> opposite way.
Seems reasonable. I should obviously apply this and will do so...
However, I'm a bit curious as to why nobody has reported this earlier.
Are the mor1kx guys running the kernel with the OR1200 option set? Does
mor1kx have the same "bug" WRT clearing interrupts? Have you been
running the mor1kx all this time without ever having been able to mask
interrupts (and things still work???)? Or is there a patch floating
about somewhere that hasn't found its way to me?
Stefan: can you comment on this?
/Jonas
>
> Signed-off-by: Dmitry Kalinkin <dmitry.kalin...@gmail.com>
> ---
> arch/openrisc/kernel/irq.c | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/openrisc/kernel/irq.c b/arch/openrisc/kernel/irq.c
> index 8ec77bc..6d1744a 100644
> --- a/arch/openrisc/kernel/irq.c
> +++ b/arch/openrisc/kernel/irq.c
> @@ -84,14 +84,14 @@ static void or1k_pic_ack(struct irq_data *data)
>
> static void or1k_pic_mask_ack(struct irq_data *data)
> {
> + mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq));
> +
> /* Comments for pic_ack apply here, too */
>
> #ifdef CONFIG_OR1K_1200
> - mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq));
> mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq));
> #else
> WARN(1, "Interrupt handling possibly broken\n");
> - mtspr(SPR_PICMR, (1UL << data->hwirq));
> mtspr(SPR_PICSR, (1UL << data->hwirq));
> #endif
> }
>
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