Kinda curious,
What is the possibility of trying LinuxBios on this hardware? `lspci
-vvv` is attached in pci.txt. It is a SiS 530 chipset, and a vendor
link to the unit is:
http://www.biostar-usa.com/products/easynow/easynowpc.htm
Just kinda curious since you can find these for < $75.00 US is most
places, and since I have a few of them. One of which was previously
installed in my car.
Regards,
Todd E. Johnson
[EMAIL PROTECTED]
00:00.0 Host bridge: Silicon Integrated Systems [SiS] 530 Host (rev 03)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping-
SERR- FastB2B-
Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort-
<MAbort+ >SERR- <PERR-
Latency: 32
Region 0: Memory at d8000000 (32-bit, non-prefetchable) [size=64M]
Capabilities: [c0] AGP version 2.0
Status: RQ=31 SBA+ 64bit- FW- Rate=x1,x2
Command: RQ=0 SBA- AGP- 64bit- FW- Rate=<none>
00:00.1 IDE interface: Silicon Integrated Systems [SiS] 5513 [IDE] (rev d0) (prog-if
80 [Master])
Subsystem: Silicon Integrated Systems [SiS] SiS5513 EIDE Controller (A,B step)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping-
SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort-
<MAbort- >SERR- <PERR-
Latency: 128
Interrupt: pin A routed to IRQ 14
Region 0: I/O ports at <ignored>
Region 1: I/O ports at <ignored>
Region 2: I/O ports at <ignored>
Region 3: I/O ports at <ignored>
Region 4: I/O ports at 4000 [size=16]
00:01.0 ISA bridge: Silicon Integrated Systems [SiS] 85C503/5513
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping-
SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort-
<MAbort- >SERR- <PERR-
Latency: 0
00:01.1 Ethernet controller: Silicon Integrated Systems [SiS] SiS900 10/100 Ethernet
(rev 01)
Subsystem: Advanced Micro Devices [AMD]: Unknown device 0900
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping-
SERR- FastB2B-
Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort-
<MAbort- >SERR- <PERR-
Latency: 32 (13000ns min, 2750ns max)
Interrupt: pin C routed to IRQ 11
Region 0: I/O ports at e400 [size=256]
Region 1: Memory at dd901000 (32-bit, non-prefetchable) [size=4K]
Expansion ROM at dc000000 [disabled] [size=128K]
Capabilities: [40] Power Management version 1
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA
PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00:01.2 USB Controller: Silicon Integrated Systems [SiS] 7001 (rev 07) (prog-if 10
[OHCI])
Subsystem: Silicon Integrated Systems [SiS] 7001
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping-
SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort-
<MAbort- >SERR- <PERR-
Latency: 32 (20000ns max), cache line size 08
Interrupt: pin D routed to IRQ 10
Region 0: Memory at dd902000 (32-bit, non-prefetchable) [size=4K]
00:01.3 Multimedia audio controller: Silicon Integrated Systems [SiS] SiS PCI Audio
Accelerator (rev 01)
Subsystem: Silicon Integrated Systems [SiS] SiS PCI Audio Accelerator
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping-
SERR- FastB2B-
Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort-
<MAbort- >SERR- <PERR-
Latency: 32 (500ns min, 6000ns max)
Interrupt: pin B routed to IRQ 12
Region 0: I/O ports at e000 [size=256]
Region 1: Memory at dd900000 (32-bit, non-prefetchable) [size=4K]
Capabilities: [dc] Power Management version 1
Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA
PME(D0-,D1-,D2+,D3hot+,D3cold+)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00:02.0 PCI bridge: Silicon Integrated Systems [SiS] 5591/5592 AGP (prog-if 00 [Normal
decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping-
SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort-
<MAbort- >SERR- <PERR-
Latency: 0
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: 0000d000-0000dfff
Memory behind bridge: dd800000-dd8fffff
Prefetchable memory behind bridge: dd000000-dd7fffff
BridgeCtl: Parity- SERR- NoISA+ VGA+ MAbort- >Reset- FastB2B-
01:00.0 VGA compatible controller: Silicon Integrated Systems [SiS] 6306 3D-AGP (rev
a3) (prog-if 00 [VGA])
Subsystem: Silicon Integrated Systems [SiS] SiS530,620 GUI Accelerator+3D
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping-
SERR- FastB2B-
Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort-
<MAbort- >SERR- <PERR-
Latency: 32 (500ns min)
Region 0: Memory at dd000000 (32-bit, prefetchable) [size=8M]
Region 1: Memory at dd800000 (32-bit, non-prefetchable) [size=64K]
Region 2: I/O ports at d000 [size=128]
Capabilities: [40] Power Management version 1
Flags: PMEClk- DSI- D1- D2+ AuxCurrent=0mA
PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] AGP version 1.0
Status: RQ=1 SBA- 64bit- FW- Rate=x1,x2
Command: RQ=0 SBA- AGP- 64bit- FW- Rate=<none>
