Stefan, If you set HAVE_HARD_RESET=0 in the Config.lb, does it work?
YH. -----邮件原件----- 发件人: Stefan Reinauer [mailto:[EMAIL PROTECTED] 发送时间: 2003年9月8日 12:18 收件人: YhLu 抄送: LinuxBIOS 主题: Re: newer solo motherboards * YhLu <[EMAIL PROTECTED]> [030908 18:55]: > HyperT reset needed > HyperT reset not needed > > In the scan_hypertranport_chain.c missed one "else" > > YH. ./src/devices/hypertransport.c:hypertransport_scan_chain() should do the right thing, i.e. trigger a reset. And it seems the reset should go to PCIDEV(1,4,0), as on all other hammer boards. But obviously the code does not do a reset, or does it continue at the same PC afterwards? > SMBus controller enabled > Ram1.00 > setting up CPU00 northbridge registers > done. > Ram2.00 How can i verify that the smbus channels LinuxBIOS uses are correct for my board? The old solos only found RAM in the first socket it seems. > Hyper transport scan link: 0 max: 1 > PCI: 01:01.0 [1022/7454] enabled next_unitid: 0004 > PCI: 01:04.0 [1022/7460] enabled next_unitid: 0008 > HyperT reset needed [ LinuxBIOS should restart HERE ] > HyperT reset not needed > PCI: pci_scan_bus for bus 1 > PCI: 01:01.0 [1022/7454] ops [..] Stefan -- Architecture Team SuSE Linux AG _______________________________________________ Linuxbios mailing list [EMAIL PROTECTED] http://www.clustermatic.org/mailman/listinfo/linuxbios _______________________________________________ Linuxbios mailing list [EMAIL PROTECTED] http://www.clustermatic.org/mailman/listinfo/linuxbios
