hi all,

I am working with a mainboard similar to PCCHIPS m758lmr+.
I want to enable VGA support. but I get some error message.

========================================================
PCCHIPS m758lmr+ (and similar)...Entering the initregs process
Southbridge fixup done for SIS 603
handle_superio start, nsuperio 1
handle_superio: Pass 2, check #0, s 0000bba0 s->super 0000bef8
handle_superio: Pass 2, Superio SiS 950
handle_superio:  port 0x2e, defaultport 0x2e
handle_superio:  Using port 0x2e
  Call finishup
handle_superio: Pass 2, done #0
handle_superio done
INSTALL REAL-MODE IDT
DO THE VGA BIOS
found VGA: vid=1039, did=6300
0x55 0xaa 0x60 0xe9 0x53 0x2 0x31 0x2e 0x30 0x37 0x2e 0x35 0x34 0x20 0x2d
0x6a biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
...........................
===================================================================

It seems that the biosint unsupport some bioscall.
how can I solve this problem?

btw: this mainboard works fine with LinuxBIOS+FILO.

best reguards.
bendany.
#
# LinuxBIOS config file for: PCCHIPS m8310lmr, Socket 7 (K7/Duron)
#

target ./newrom

# pcchips 758lmr
mainboard pcchips/m758lmr+

# Enable MII support (required for new 810/8310 mainboard)
option ENABLE_MII=1

# Enable Serial Console for debugging
option SERIAL_CONSOLE=1

# Use 256KB Standard Flash as Normal BIOS 
option USE_GENERIC_ROM=1
option STD_FLASH=1
option VGABIOS_START=0xfffc0000
option ZKERNEL_START=0xfffd0000

# payload size = 192KB
option PAYLOAD_SIZE=196608
# Rom image size = 63KB
option ROM_IMAGE_SIZE=64512

# We reuse docipl from DoC
docipl northsouthbridge/sis/630/ipl.S

# Use the internal VGA frame buffer device
option HAVE_FRAMEBUFFER=1
option HAVE_FRAMEBUFFER=1
option SMA_SIZE=8
option CONFIG_VGABIOS=1
option CONFIG_REALMODE_IDT=1
option CONFIG_PCIBIOS=1
dir src/bioscall

# use ELF Loader to load Etherboot
option USE_ELF_BOOT=1

# Use Etherboot as our payload 
#payload ~/filo-0.2/filo.elf
payload ../vgaeth.bin

# Add our own special make rules to handle 256KB flash with docipl
makerule romimage: linuxbios.rom payload.block docipl ;
addaction romimage cat payload.block linuxbios.rom docipl.bin > romimage

makerule docipl: ipl.o ;
addaction docipl objcopy -O binary -R .note -R .comment -S ipl.o docipl
addaction docipl dd if=docipl skip=126 of=docipl.bin

makerule linuxbios.rom: linuxbios.strip ;
addaction linuxbios.rom dd if=linuxbios.strip of=linuxbios.rom bs=$(ROM_IMAGE_SIZE) 
conv=sync

# Kernel command line parameters
# commandline root=/dev/hda1 console=ttyS0,115200 console=tty0 video=sisfb:[EMAIL 
PROTECTED],font:VGA8x16
Copying LinuxBIOS to ram.
Jumping to LinuxBIOS.
LinuxBIOS-1.0.0 Mon Sep 22 13:42:47 CST 2003 booting...
Finding PCI configuration type.
PCI: Using configuration type 1
handle_superio start, nsuperio 1
handle_superio: Pass 0, check #0, s 0000bba0 s->super 0000bef8
handle_superio: Pass 0, Superio SiS 950
handle_superio:  port 0x0, defaultport 0x2e
handle_superio:  Using port 0x2e
handle_superio: Pass 0, done #0
handle_superio done
Scanning PCI bus...PCI: pci_scan_bus for bus 0
PCI: 00:00.0 [1039/0630]
PCI: 00:00.1 [1039/5513]
PCI: 00:01.0 [1039/0008]
PCI: 00:01.1 [1039/0900]
PCI: 00:01.2 [1039/7001]
PCI: 00:01.3 [1039/7001]
PCI: 00:01.4 [1039/7018]
PCI: 00:01.6 [1039/7013]
PCI: 00:02.0 [1039/0001]
PCI: 00:0e.0 [104c/8020]
PCI: pci_scan_bus for bus 1
PCI: 01:00.0 [1039/6300]
PCI: pci_scan_bus returning with max=01
PCI: pci_scan_bus returning with max=01
done
Allocating PCI resources...
ASSIGN RESOURCES, bus 0
PCI: 00:00.0 10 <- [0xe8000000 - 0xefffffff] mem
PCI: 00:00.1 10 <- [0x00002c90 - 0x00002c97] io
PCI: 00:00.1 14 <- [0x00002cb0 - 0x00002cb3] io
PCI: 00:00.1 18 <- [0x00002ca0 - 0x00002ca7] io
PCI: 00:00.1 1c <- [0x00002cc0 - 0x00002cc3] io
PCI: 00:00.1 20 <- [0x00002c80 - 0x00002c8f] io
PCI: 00:01.1 10 <- [0x00002000 - 0x000020ff] io
PCI: 00:01.1 14 <- [0xf8104000 - 0xf8104fff] mem
PCI: 00:01.2 10 <- [0xf8105000 - 0xf8105fff] mem
PCI: 00:01.3 10 <- [0xf8106000 - 0xf8106fff] mem
PCI: 00:01.4 10 <- [0x00002400 - 0x000024ff] io
PCI: 00:01.4 14 <- [0xf8107000 - 0xf8107fff] mem
PCI: 00:01.6 10 <- [0x00002800 - 0x000028ff] io
PCI: 00:01.6 14 <- [0x00002c00 - 0x00002c7f] io
PCI: 00:02.0 1c <- [0x00001000 - 0x00001fff] bus 1 io
PCI: 00:02.0 24 <- [0xf0000000 - 0xf7ffffff] bus 1 prefmem
PCI: 00:02.0 20 <- [0xf8000000 - 0xf80fffff] bus 1 mem
ASSIGN RESOURCES, bus 1
PCI: 01:00.0 10 <- [0xf0000000 - 0xf7ffffff] prefmem
PCI: 01:00.0 14 <- [0xf8000000 - 0xf801ffff] mem
PCI: 01:00.0 18 <- [0x00001000 - 0x0000107f] io
ASSIGNED RESOURCES, bus 1
PCI: 00:0e.0 10 <- [0xf8108000 - 0xf81087ff] mem
PCI: 00:0e.0 14 <- [0xf8100000 - 0xf8103fff] mem
ASSIGNED RESOURCES, bus 0
Allocating VGA resource
done.
Enabling PCI resourcess...PCI: 00:00.0 cmd <- 07
PCI: 00:00.1 cmd <- 01
PCI: 00:01.0 cmd <- 0c
PCI: 00:01.1 cmd <- 03
PCI: 00:01.2 cmd <- 02
PCI: 00:01.3 cmd <- 02
PCI: 00:01.4 cmd <- 03
PCI: 00:01.6 cmd <- 01
PCI: 00:02.0 cmd <- 27
PCI: 00:0e.0 cmd <- 02
PCI: 01:00.0 cmd <- 03
done.
Initializing PCI devices...
PCI devices initialized
totalram: 254M
Initializing CPU #0
Enabling cache...
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) type: WB
DONE fixed MTRRs
Setting variable MTRR 0, base:    0MB, range:  128MB, type WB
Setting variable MTRR 1, base:  128MB, range:   64MB, type WB
Setting variable MTRR 2, base:  192MB, range:   32MB, type WB
Setting variable MTRR 3, base:  224MB, range:   16MB, type WB
Setting variable MTRR 4, base:  240MB, range:    8MB, type WB
Setting variable MTRR 5, base:  248MB, range:    4MB, type WB
DONE variable MTRRs
Clear out the extra MTRR's
call intel_enable_fixed_mtrr()
call intel_enable_var_mtrr()
Leave setup_mtrrs
done.

Max cpuid index    : 2
Vendor ID          : GenuineIntel
Processor Type     : 0x00
Processor Family   : 0x06
Processor Model    : 0x06
Processor Mask     : 0x00
Processor Stepping : 0x05
Feature flags      : 0x0183fbff

Cache/TLB descriptor values: 1 reads required
Desc 0x01 : Instr TLB: 4KB pages, 4-way set assoc, 32 entries
Desc 0x02 : Instr TLB: 4MB pages, fully assoc, 2 entries
Desc 0x03 : Data TLB: 4KB pages, 4-way set assoc, 64 entries
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x40 : No L2 cache
Desc 0x08 : Inst cache: 16K bytes, 4-way set assoc, 32 byte line size
Desc 0x04 : Data TLB: 4MB pages, 4-way set assoc, 8 entries
Desc 0x0c : Data cache: 16K bytes, 2-way or 4-way set assoc, 32 byte line size



MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Disabling local apic...done.
CPU #0 Initialized
Enabled in SIS 503 regs 0x40 and 0x45
Now try to turn off shadow
handle_superio start, nsuperio 1
handle_superio: Pass 1, check #0, s 0000bba0 s->super 0000bef8
handle_superio: Pass 1, Superio SiS 950
handle_superio:  port 0x2e, defaultport 0x2e
handle_superio:  Using port 0x2e
handle_superio: Pass 1, done #0
handle_superio done
PCCHIPS m758lmr+ (and similar)...Entering the initregs process
Southbridge fixup done for SIS 603
handle_superio start, nsuperio 1
handle_superio: Pass 2, check #0, s 0000bba0 s->super 0000bef8
handle_superio: Pass 2, Superio SiS 950
handle_superio:  port 0x2e, defaultport 0x2e
handle_superio:  Using port 0x2e
  Call finishup
handle_superio: Pass 2, done #0
handle_superio done
INSTALL REAL-MODE IDT
DO THE VGA BIOS
found VGA: vid=1039, did=6300
0x55 0xaa 0x60 0xe9 0x53 0x2 0x31 0x2e 0x30 0x37 0x2e 0x35 0x34 0x20 0x2d 0x6a 
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2

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