OK, the first SPD work is in. Ram size is now set from SPD. 

The next line of attack are the MA registers. 

The code is walking a tight line between code space size and register 
allocation; see 
northbridge/via/vt8601/raminit.c
for some details. These old pentiums are tight on registers!

That said, doing this in C is even better than having an ICE.

ron

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