ron minnich <[EMAIL PROTECTED]> writes:
> On 10 Oct 2003, Eric W. Biederman wrote:
>
> >
> > southbridge amd/amd8111 "amd8111"
> > pci 0:0.0 on
> > pci 0:1.0 on
> > pci 0:1.1 on
> > pci 0:1.2 on
> > pci 0:1.3 on
> > pci 0:1.5 on
> > pci 0:1.6 off
> >
> > end
>
> BEAUTIFUL.
And baring bugs the enable function looks like:
void amd8111_enable(device_t dev)
{
device_t lpc_dev;
unsigned index;
uint16_t reg;
/* See if we are on the behind the amd8111 pci bridge */
if ((dev->bus->dev->vendor == PCI_VENDOR_ID_AMD) &&
(dev->bus->dev->device == PCI_DEVICE_ID_AMD_8111_PCI)) {
lpc_dev = dev_find_slot(dev->bus->dev->bus, dev->bus->path.pci.devfn +
(1 << 3));
index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
} else {
lpc_dev = dev_find_slot(dev->bus, dev->path.pci.devfn & ~7);
index = dev->path.pci.devfn & 7;
}
if (index >= 16) {
return;
}
reg = pci_read_config16(lpc_dev, 0x48);
reg &= ~(1 << index);
if (dev->enable) {
reg |= (1 << index);
}
pci_write_config16(lpc_dev, 0x48, reg);
}
The one piece of this that I have not resolved yet is how to specify a device
in the static device tree which has it's own internal pci bridge on it
and devices behind that bridge.
The fun part here is that I can have multiple amd8111 with different
pieces enabled.
I have a small theoretical problem if for some reason the device that
controls the enables is does not precede the rest of the devices. But
I will cross that bridge when I come to it.
Eric
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