diff -uNr ./freebios2/src/include/cpu/p6/msr.h ../freebios2/src/include/cpu/p6/msr.h --- ./freebios2/src/include/cpu/p6/msr.h 2003-07-18 21:28:21.000000000 -0700 +++ ../freebios2/src/include/cpu/p6/msr.h 2004-08-31 11:22:13.000000000 -0700 @@ -26,7 +26,7 @@ static tsc_t rdtsc(void) { tsc_t res; - asm ("rdtsc" + asm volatile ("rdtsc" : "=a" (res.lo), "=d"(res.hi) /* outputs */ : /* inputs */ : /* Clobbers */ diff -uNr ./freebios2/src/mainboard/amd/quartet/auto.c ../freebios2/src/mainboard/amd/quartet/auto.c --- ./freebios2/src/mainboard/amd/quartet/auto.c 2004-04-28 01:08:06.000000000 -0700 +++ ../freebios2/src/mainboard/amd/quartet/auto.c 2004-09-29 09:30:57.000000000 -0700 @@ -1,6 +1,6 @@ #define ASSEMBLY 1 -#define MAXIMUM_CONSOLE_LOGLEVEL 9 -#define DEFAULT_CONSOLE_LOGLEVEL 9 +//#define MAXIMUM_CONSOLE_LOGLEVEL 9 +//#define DEFAULT_CONSOLE_LOGLEVEL 9 #include #include @@ -100,11 +100,12 @@ */ uint32_t ret = 0x00010101; /* default row entry */ - +/* static const unsigned int rows_2p[2][2] = { {0x00030101, 0x00010202}, {0x00010202, 0x00030101} }; +*/ static const unsigned int rows_4p[4][4] = { {0x00070101, 0x00010202, 0x00030404, 0x00010204}, @@ -114,9 +115,11 @@ }; if (!(node >= maxnodes || row >= maxnodes)) { +/* if (maxnodes == 2) ret = rows_2p[node][row]; if (maxnodes == 4) +*/ ret = rows_4p[node][row]; } @@ -199,6 +203,20 @@ .channel1 = {RC3 | DIMM1, RC3 | DIMM3, 0, 0}, } }; + + static const struct ht_chain ht_c[] = { + { /* Link 2 of CPU0 */ + .udev = PCI_DEV(0, 0x18, 0), + .upos = 0xc0, + .devreg = 0xe0, /* Preset bus num in resource map */ + }, + { /* Link 1 of CPU1 */ + .udev = PCI_DEV(0, 0x19, 0), + .upos = 0xa0, + .devreg = 0xe4, /* Preset bus num in resource map */ + }, + }; + int needs_reset; enable_lapic(); @@ -219,7 +237,8 @@ console_init(); setup_quartet_resource_map(); needs_reset = setup_coherent_ht_domain(); - needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0x80); +// needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0x80); + needs_reset |= ht_setup_chains(ht_c, sizeof(ht_c)/sizeof(ht_c[0])); if (needs_reset) { print_info("ht reset -\r\n"); soft_reset(); diff -uNr ./freebios2/src/mainboard/tyan/s2735/Config.lb ../freebios2/src/mainboard/tyan/s2735/Config.lb --- ./freebios2/src/mainboard/tyan/s2735/Config.lb 2004-06-30 20:55:01.000000000 -0700 +++ ../freebios2/src/mainboard/tyan/s2735/Config.lb 2004-08-11 20:21:59.000000000 -0700 @@ -178,7 +178,7 @@ pci 0:1f.5 off pci 0:1f.6 off # pci 1:8.0 off - superio winbond/w83627hf + superio winbond/w83627hf link 1 pnp 2e.0 on # Floppy io 0x60 = 0x3f0 irq 0x70 = 6 diff -uNr ./freebios2/src/mainboard/tyan/s2735/irq_tables.c ../freebios2/src/mainboard/tyan/s2735/irq_tables.c --- ./freebios2/src/mainboard/tyan/s2735/irq_tables.c 2004-06-30 20:55:01.000000000 -0700 +++ ../freebios2/src/mainboard/tyan/s2735/irq_tables.c 2004-08-11 20:01:44.000000000 -0700 @@ -18,7 +18,7 @@ 0x24d0, /* Device */ 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x9a, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ + 0x91, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ { /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ {0x04,(0x08<<3)|0x0, {{0x68, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, diff -uNr ./freebios2/src/mainboard/tyan/s2850/auto.c ../freebios2/src/mainboard/tyan/s2850/auto.c --- ./freebios2/src/mainboard/tyan/s2850/auto.c 2004-09-09 00:19:40.000000000 -0700 +++ ../freebios2/src/mainboard/tyan/s2850/auto.c 2004-08-31 18:52:53.000000000 -0700 @@ -104,7 +104,6 @@ #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "northbridge/amd/amdk8/resourcemap.c" #include "sdram/generic_sdram.c" static void main(void) @@ -129,7 +128,7 @@ enable_lapic(); init_timer(); if (cpu_init_detected()) { - asm("jmp __cpu_reset"); + asm volatile ("jmp __cpu_reset"); } distinguish_cpu_resets(); if (!boot_cpu()) { diff -uNr ./freebios2/src/mainboard/tyan/s2850/failover.c ../freebios2/src/mainboard/tyan/s2850/failover.c --- ./freebios2/src/mainboard/tyan/s2850/failover.c 2004-04-24 16:00:53.000000000 -0700 +++ ../freebios2/src/mainboard/tyan/s2850/failover.c 2004-08-31 18:52:30.000000000 -0700 @@ -60,13 +60,13 @@ goto fallback_image; } normal_image: - asm("jmp __normal_image" + asm volatile ("jmp __normal_image" : /* outputs */ : "a" (bist) /* inputs */ : /* clobbers */ ); cpu_reset: - asm("jmp __cpu_reset" + asm volatile ("jmp __cpu_reset" : /* outputs */ : "a"(bist) /* inputs */ : /* clobbers */ diff -uNr ./freebios2/src/mainboard/tyan/s2875/auto.c ../freebios2/src/mainboard/tyan/s2875/auto.c --- ./freebios2/src/mainboard/tyan/s2875/auto.c 2004-04-24 16:00:54.000000000 -0700 +++ ../freebios2/src/mainboard/tyan/s2875/auto.c 2004-08-31 18:53:37.000000000 -0700 @@ -152,7 +152,7 @@ enable_lapic(); init_timer(); if (cpu_init_detected()) { - asm("jmp __cpu_reset"); + asm volatile ("jmp __cpu_reset"); } distinguish_cpu_resets(); if (!boot_cpu()) { diff -uNr ./freebios2/src/mainboard/tyan/s2875/failover.c ../freebios2/src/mainboard/tyan/s2875/failover.c --- ./freebios2/src/mainboard/tyan/s2875/failover.c 2004-04-24 16:00:54.000000000 -0700 +++ ../freebios2/src/mainboard/tyan/s2875/failover.c 2004-08-31 18:53:25.000000000 -0700 @@ -60,13 +60,13 @@ goto fallback_image; } normal_image: - asm("jmp __normal_image" + asm volatile ("jmp __normal_image" : /* outputs */ : "a" (bist) /* inputs */ : /* clobbers */ ); cpu_reset: - asm("jmp __cpu_reset" + asm volatile ("jmp __cpu_reset" : /* outputs */ : "a"(bist) /* inputs */ : /* clobbers */ diff -uNr ./freebios2/src/mainboard/tyan/s2880/auto.c ../freebios2/src/mainboard/tyan/s2880/auto.c --- ./freebios2/src/mainboard/tyan/s2880/auto.c 2004-04-24 16:01:03.000000000 -0700 +++ ../freebios2/src/mainboard/tyan/s2880/auto.c 2004-08-31 18:54:24.000000000 -0700 @@ -153,7 +153,7 @@ enable_lapic(); init_timer(); if (cpu_init_detected()) { - asm("jmp __cpu_reset"); + asm volatile ("jmp __cpu_reset"); } distinguish_cpu_resets(); if (!boot_cpu()) { diff -uNr ./freebios2/src/mainboard/tyan/s2880/failover.c ../freebios2/src/mainboard/tyan/s2880/failover.c --- ./freebios2/src/mainboard/tyan/s2880/failover.c 2004-03-12 07:13:30.000000000 -0800 +++ ../freebios2/src/mainboard/tyan/s2880/failover.c 2004-08-31 18:54:02.000000000 -0700 @@ -60,13 +60,13 @@ goto fallback_image; } normal_image: - asm("jmp __normal_image" + asm volatile ("jmp __normal_image" : /* outputs */ : "a" (bist) /* inputs */ : /* clobbers */ ); cpu_reset: - asm("jmp __cpu_reset" + asm volatile ("jmp __cpu_reset" : /* outputs */ : "a"(bist) /* inputs */ : /* clobbers */ diff -uNr ./freebios2/src/mainboard/tyan/s2881/auto.c ../freebios2/src/mainboard/tyan/s2881/auto.c --- ./freebios2/src/mainboard/tyan/s2881/auto.c 2004-04-24 16:01:06.000000000 -0700 +++ ../freebios2/src/mainboard/tyan/s2881/auto.c 2004-08-31 18:55:23.000000000 -0700 @@ -152,7 +152,7 @@ enable_lapic(); init_timer(); if (cpu_init_detected()) { - asm("jmp __cpu_reset"); + asm volatile ("jmp __cpu_reset"); } distinguish_cpu_resets(); if (!boot_cpu()) { diff -uNr ./freebios2/src/mainboard/tyan/s2881/failover.c ../freebios2/src/mainboard/tyan/s2881/failover.c --- ./freebios2/src/mainboard/tyan/s2881/failover.c 2004-03-12 07:13:31.000000000 -0800 +++ ../freebios2/src/mainboard/tyan/s2881/failover.c 2004-08-31 18:54:52.000000000 -0700 @@ -60,13 +60,13 @@ goto fallback_image; } normal_image: - asm("jmp __normal_image" + asm volatile ("jmp __normal_image" : /* outputs */ : "a" (bist) /* inputs */ : /* clobbers */ ); cpu_reset: - asm("jmp __cpu_reset" + asm volatile ("jmp __cpu_reset" : /* outputs */ : "a"(bist) /* inputs */ : /* clobbers */ diff -uNr ./freebios2/src/mainboard/tyan/s2882/Config.lb ../freebios2/src/mainboard/tyan/s2882/Config.lb --- ./freebios2/src/mainboard/tyan/s2882/Config.lb 2004-05-06 14:39:38.000000000 -0700 +++ ../freebios2/src/mainboard/tyan/s2882/Config.lb 2004-06-03 17:53:19.000000000 -0700 @@ -132,7 +132,7 @@ makerule ./failover.inc depends "./romcc ./failover.E" - action "./romcc -O2 -o failover.inc --label-prefix=failover ./failover.E" + action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E" end makerule ./auto.E diff -uNr ./freebios2/src/mainboard/tyan/s2882/failover.c ../freebios2/src/mainboard/tyan/s2882/failover.c --- ./freebios2/src/mainboard/tyan/s2882/failover.c 2004-03-12 07:13:31.000000000 -0800 +++ ../freebios2/src/mainboard/tyan/s2882/failover.c 2004-06-02 22:00:33.000000000 -0700 @@ -60,13 +60,13 @@ goto fallback_image; } normal_image: - asm("jmp __normal_image" + asm volatile ("jmp __normal_image" : /* outputs */ : "a" (bist) /* inputs */ : /* clobbers */ ); cpu_reset: - asm("jmp __cpu_reset" + asm volatile ("jmp __cpu_reset" : /* outputs */ : "a"(bist) /* inputs */ : /* clobbers */ diff -uNr ./freebios2/src/mainboard/tyan/s2882/irq_tables.c ../freebios2/src/mainboard/tyan/s2882/irq_tables.c --- ./freebios2/src/mainboard/tyan/s2882/irq_tables.c 2004-03-12 07:13:31.000000000 -0800 +++ ../freebios2/src/mainboard/tyan/s2882/irq_tables.c 2004-07-02 10:01:48.000000000 -0700 @@ -18,7 +18,7 @@ 0x746b, /* Device */ 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x8d, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ + 0xff, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ { {1,(4<<3)|0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0, 0}, {0x4,0, {{0, 0}, {0, 0}, {0, 0}, {0x4, 0xdef8}}, 0, 0}, diff -uNr ./freebios2/src/mainboard/tyan/s2882/mptable.c ../freebios2/src/mainboard/tyan/s2882/mptable.c --- ./freebios2/src/mainboard/tyan/s2882/mptable.c 2004-03-12 07:13:31.000000000 -0800 +++ ../freebios2/src/mainboard/tyan/s2882/mptable.c 2004-09-01 15:52:45.000000000 -0700 @@ -1,9 +1,12 @@ #include #include #include +#include #include #include +#define ASSIGN_IRQ 1 + void *smp_write_config_table(void *v, unsigned long * processor_map) { static const char sig[4] = "PCMP"; @@ -115,27 +118,82 @@ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, 0x2, 0xe); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, 0x2, 0xf); - +#if ASSIGN_IRQ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, (4<<2)|3, 0x2, 0x13); + + { + device_t dev; + dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x746b, 0); + if (dev) { + /* initialize PCI interupts - these assignments depend + on the PCB routing of PINTA-D + + PINTA = IRQ5 + PINTB = IRQ9 + PINTC = IRQ11 + PINTD = IRQ10 + */ + pci_write_config16(dev, 0x56, 0xab95); + } + } +#endif + +#if ASSIGN_IRQ + printk_info("setting Onboard AMD Southbridge \n"); + static const unsigned char slotIrqs_1_4[4] = { 5, 9, 11, 10 }; + pci_assign_irqs(1, 4, slotIrqs_1_4); +#endif //On Board AMD USB smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, 0x2, 0x13); +#if ASSIGN_IRQ + printk_info("setting Onboard AMD USB \n"); + static const unsigned char slotIrqs_8111_1_0[4] = { 0, 0, 0, 10 }; + pci_assign_irqs(bus_8111_1, 0, slotIrqs_8111_1_0); +#endif + //On Board ATI Display Adapter smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (6<<2)|0, 0x2, 0x12); +#if ASSIGN_IRQ + printk_info("setting Onboard ATI Display Adapter\n"); + static const unsigned char slotIrqs_8111_1_6[4] = { 11, 0, 0, 0 }; + pci_assign_irqs(bus_8111_1, 6, slotIrqs_8111_1_6); +#endif + #if 1 //Slot 5 PCI 32 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (4<<2)|0, 0x2, 0x10); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (4<<2)|1, 0x2, 0x11); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (4<<2)|2, 0x2, 0x12); // smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (4<<2)|3, 0x2, 0x13); // + +#if ASSIGN_IRQ + printk_info("setting Slot 5 \n"); + static const unsigned char slotIrqs_8111_1_4[4] = { 5, 9, 11, 10 }; + pci_assign_irqs(bus_8111_1, 4, slotIrqs_8111_1_4); +#endif + #endif //Onboard SI Serial ATA smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (5<<2)|0, 0x2, 0x13); + +#if ASSIGN_IRQ + printk_info("setting Onboard SI Serail ATA\n"); + static const unsigned char slotIrqs_8111_1_5[4] = { 10, 0, 0, 0 }; + pci_assign_irqs(bus_8111_1, 5, slotIrqs_8111_1_5); +#endif + //Onboard Intel 82551 10/100M NIC smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (8<<2)|0, 0x2, 0x12); +#if ASSIGN_IRQ + printk_info("setting Onboard Intel NIC\n"); + static const unsigned char slotIrqs_8111_1_8[4] = { 11, 0, 0, 0 }; + pci_assign_irqs(bus_8111_1, 8, slotIrqs_8111_1_8); +#endif + #if 1 //Slot 3 PCIX 100/66 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|0, 0x3, 0x3); @@ -143,18 +201,46 @@ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|2, 0x3, 0x1);// smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (3<<2)|3, 0x3, 0x2);// +#if ASSIGN_IRQ + printk_info("setting Slot 3\n"); + static const unsigned char slotIrqs_8131_1_3[4] = { 10, 5, 9, 11 }; + pci_assign_irqs(bus_8131_1, 3, slotIrqs_8131_1_3); +#endif + //Slot 4 PCIX 100/66 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|0, 0x3, 0x2); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|1, 0x3, 0x3);// smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|2, 0x3, 0x0);// smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (2<<2)|3, 0x3, 0x1);// + +#if ASSIGN_IRQ + printk_info("setting Slot 4\n"); + static const unsigned char slotIrqs_8131_1_2[4] = { 11, 10, 5, 9 }; + pci_assign_irqs(bus_8131_1, 2, slotIrqs_8131_1_2); +#endif + #endif //Onboard adaptec scsi smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (6<<2)|0, 0x3, 0x0); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (6<<2)|1, 0x3, 0x1); + +#if ASSIGN_IRQ + printk_info("setting Onboard Adaptec SCSI\n"); + static const unsigned char slotIrqs_8131_1_6[4] = { 5, 9, 0, 0 }; + pci_assign_irqs(bus_8131_1, 6, slotIrqs_8131_1_6); +#endif + //On Board NIC smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (9<<2)|0, 0x3, 0x0); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (9<<2)|1, 0x3, 0x1); + + +#if ASSIGN_IRQ + printk_info("setting Onboard Broadcom NIC\n"); + static const unsigned char slotIrqs_8131_1_9[4] = { 5, 9, 0, 0 }; + pci_assign_irqs(bus_8131_1, 9, slotIrqs_8131_1_9); +#endif + #if 1 //Slot 1 PCI-X 133/100/66 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|0, 0x4, 0x0); @@ -162,12 +248,24 @@ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|2, 0x4, 0x2); // smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|3, 0x4, 0x3); // +#if ASSIGN_IRQ + printk_info("setting Slot 1\n"); + static const unsigned char slotIrqs_8131_2_3[4] = { 5, 9, 11, 10 }; + pci_assign_irqs(bus_8131_2, 3, slotIrqs_8131_2_3); +#endif + //Slot 2 PCI-X 133/100/66 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (1<<2)|0, 0x4, 0x1); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (1<<2)|1, 0x4, 0x2); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (1<<2)|2, 0x4, 0x3);// smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (1<<2)|3, 0x4, 0x0);// +#if ASSIGN_IRQ + printk_info("setting Slot 2\n"); + static const unsigned char slotIrqs_8131_2_1[4] = { 9, 11, 10, 5 }; + pci_assign_irqs(bus_8131_2, 1, slotIrqs_8131_2_1); +#endif + #endif /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0); diff -uNr ./freebios2/src/mainboard/tyan/s2885/resourcemap.c ../freebios2/src/mainboard/tyan/s2885/resourcemap.c --- ./freebios2/src/mainboard/tyan/s2885/resourcemap.c 2004-03-26 13:34:04.000000000 -0800 +++ ../freebios2/src/mainboard/tyan/s2885/resourcemap.c 2004-09-20 11:00:09.000000000 -0700 @@ -252,8 +252,8 @@ * [31:24] Bus Number Limit i * This field defines the highest bus number in configuration regin i */ - PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x06010207, - PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000007, + PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x06000203, // AMD 8111 on link2 of CPU 0 + PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x08070003, // AMD 8151 on link0 of CPU 0 PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, }; diff -uNr ./freebios2/src/mainboard/tyan/s4880/auto.c ../freebios2/src/mainboard/tyan/s4880/auto.c --- ./freebios2/src/mainboard/tyan/s4880/auto.c 2004-04-24 16:01:19.000000000 -0700 +++ ../freebios2/src/mainboard/tyan/s4880/auto.c 2004-08-31 18:57:46.000000000 -0700 @@ -28,7 +28,7 @@ set_bios_reset(); /* enable cf9 */ - pci_write_config8(PCI_DEV(1, 0x04, 3), 0x41, 0xf1); + pci_write_config8(PCI_DEV(0, 0x04, 3), 0x41, 0xf1); /* reset */ outb(0x0e, 0x0cf9); } @@ -36,7 +36,7 @@ static void soft_reset(void) { set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); + pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1); } @@ -203,7 +203,7 @@ enable_lapic(); init_timer(); if (cpu_init_detected()) { - asm("jmp __cpu_reset"); + asm volatile ("jmp __cpu_reset"); } distinguish_cpu_resets(); if (!boot_cpu()) { @@ -214,7 +214,7 @@ console_init(); setup_s4880_resource_map(); needs_reset = setup_coherent_ht_domain(); - needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0x80); + needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0xc0); if (needs_reset) { print_info("ht reset -\r\n"); soft_reset(); diff -uNr ./freebios2/src/mainboard/tyan/s4880/failover.c ../freebios2/src/mainboard/tyan/s4880/failover.c --- ./freebios2/src/mainboard/tyan/s4880/failover.c 2004-03-12 07:13:33.000000000 -0800 +++ ../freebios2/src/mainboard/tyan/s4880/failover.c 2004-08-31 18:57:06.000000000 -0700 @@ -60,13 +60,13 @@ goto fallback_image; } normal_image: - asm("jmp __normal_image" + asm volatile ("jmp __normal_image" : /* outputs */ : "a" (bist) /* inputs */ : /* clobbers */ ); cpu_reset: - asm("jmp __cpu_reset" + asm volatile ("jmp __cpu_reset" : /* outputs */ : "a"(bist) /* inputs */ : /* clobbers */ diff -uNr ./freebios2/src/mainboard/tyan/s4882/auto.c ../freebios2/src/mainboard/tyan/s4882/auto.c --- ./freebios2/src/mainboard/tyan/s4882/auto.c 2004-04-24 16:01:33.000000000 -0700 +++ ../freebios2/src/mainboard/tyan/s4882/auto.c 2004-09-29 09:12:41.000000000 -0700 @@ -203,7 +204,7 @@ enable_lapic(); init_timer(); if (cpu_init_detected()) { - asm("jmp __cpu_reset"); + asm volatile ("jmp __cpu_reset"); } distinguish_cpu_resets(); if (!boot_cpu()) { diff -uNr ./freebios2/src/mainboard/tyan/s4882/failover.c ../freebios2/src/mainboard/tyan/s4882/failover.c --- ./freebios2/src/mainboard/tyan/s4882/failover.c 2004-03-25 01:31:10.000000000 -0800 +++ ../freebios2/src/mainboard/tyan/s4882/failover.c 2004-08-31 18:58:34.000000000 -0700 @@ -60,13 +60,13 @@ goto fallback_image; } normal_image: - asm("jmp __normal_image" + asm volatile ("jmp __normal_image" : /* outputs */ : "a" (bist) /* inputs */ : /* clobbers */ ); cpu_reset: - asm("jmp __cpu_reset" + asm volatile ("jmp __cpu_reset" : /* outputs */ : "a"(bist) /* inputs */ : /* clobbers */ diff -uNr ./freebios2/src/northbridge/amd/amdk8/incoherent_ht.c ../freebios2/src/northbridge/amd/amdk8/incoherent_ht.c --- ./freebios2/src/northbridge/amd/amdk8/incoherent_ht.c 2004-04-15 10:33:21.000000000 -0700 +++ ../freebios2/src/northbridge/amd/amdk8/incoherent_ht.c 2004-08-24 12:03:10.000000000 -0700 @@ -247,19 +263,21 @@ unsigned upos; unsigned devreg; }; - -static int ht_setup_chainx(device_t udev, unsigned upos, unsigned next_unitid) +static int ht_setup_chainx(device_t udev, unsigned upos, unsigned bus) { - unsigned last_unitid; + unsigned next_unitid, last_unitid; unsigned uoffs; int reset_needed=0; uoffs = PCI_HT_HOST_OFFS; + next_unitid = 1; + do { uint32_t id; uint8_t pos; unsigned flags, count; - device_t dev = PCI_DEV(0, 0, 0); + + device_t dev = PCI_DEV(bus, 0, 0); last_unitid = next_unitid; id = pci_read_config32(dev, PCI_VENDOR_ID); @@ -293,8 +328,7 @@ next_unitid += count; } while((last_unitid != next_unitid) && (next_unitid <= 0x1f)); - if(reset_needed!=0) next_unitid |= 0xffff0000; - return next_unitid; + return reset_needed; } static int ht_setup_chains(const struct ht_chain *ht_c, int ht_c_num) @@ -304,65 +338,49 @@ * non Coherent links the appropriate bus registers for the * links needs to be programed to point at bus 0. */ - unsigned next_unitid; int reset_needed; - unsigned upos; - device_t udev; + unsigned upos; + device_t udev; int i; - /* Make certain the HT bus is not enumerated */ - ht_collapse_previous_enumeration(0); - reset_needed = 0; - next_unitid = 1; for (i = 0; i < ht_c_num; i++) { uint32_t reg; - uint8_t reg8; + unsigned devpos; + unsigned regpos; + uint32_t dword; + unsigned busn; + reg = pci_read_config32(PCI_DEV(0,0x18,1), ht_c[i].devreg); - reg |= (0xff<<24) | 7; - reg &= ~(0xff<<16); - pci_write_config32(PCI_DEV(0,0x18,1), ht_c[i].devreg, reg); -#if CONFIG_MAX_CPUS > 1 - pci_write_config32(PCI_DEV(0,0x19,1), ht_c[i].devreg, reg); -#endif -#if CONFIG_MAX_CPUS > 2 - pci_write_config32(PCI_DEV(0,0x1a,1), ht_c[i].devreg, reg); - pci_write_config32(PCI_DEV(0,0x1b,1), ht_c[i].devreg, reg); + //We need setup 0x94, 0xb4, and 0xd4 according to the reg + devpos = ((reg & 0xf0)>>4)+0x18; // nodeid; it will decide 0x18 or 0x19 + regpos = ((reg & 0xf00)>>8) * 0x20 + 0x94; // link n; it will decide 0x94 or 0xb4, 0x0xd4; + busn = (reg & 0xff0000)>>16; + + dword = pci_read_config32( PCI_DEV(0, devpos, 0), regpos) ; + dword &= ~(0xffff<<8); + dword |= (reg & 0xffff0000)>>8; + pci_write_config32( PCI_DEV(0, devpos,0), regpos , dword); +#if 0 + print_debug("PCI_DEV=(0,0x"); + print_debug_hex8(devpos); + print_debug(",0) 0x"); + print_debug_hex8(regpos); + print_debug("="); + print_debug_hex32(dword); + print_debug("\r\n"); #endif + + /* Make certain the HT bus is not enumerated */ + ht_collapse_previous_enumeration(busn); - //Store dev min - reg8 = next_unitid & 0xff ; - upos = ht_c[i].upos; - udev = ht_c[i].udev; - - next_unitid = ht_setup_chainx(udev,upos,next_unitid); - if((next_unitid & 0xffff0000) == 0xffff0000) { - reset_needed |= 1; - next_unitid &=0x0000ffff; - } - - //set dev min - pci_write_config8(PCI_DEV(0,0x18,1), ht_c[i].devreg+2, reg8); -#if CONFIG_MAX_CPUS > 1 - pci_write_config8(PCI_DEV(0,0x19,1), ht_c[i].devreg+2, reg8); -#endif -#if CONFIG_MAX_CPUS > 2 - pci_write_config8(PCI_DEV(0,0x1a,1), ht_c[i].devreg+2, reg8); - pci_write_config8(PCI_DEV(0,0x1b,1), ht_c[i].devreg+2, reg8); -#endif + upos = ht_c[i].upos; + udev = ht_c[i].udev; + + reset_needed |= ht_setup_chainx(udev,upos,busn ); - //Set dev max - reg8 = (next_unitid-1) & 0xff ; - pci_write_config8(PCI_DEV(0,0x18,1), ht_c[i].devreg+3, reg8); -#if CONFIG_MAX_CPUS > 1 - pci_write_config8(PCI_DEV(0,0x19,1), ht_c[i].devreg+3, reg8); -#endif -#if CONFIG_MAX_CPUS > 2 - pci_write_config8(PCI_DEV(0,0x1a,1), ht_c[i].devreg+3, reg8); - pci_write_config8(PCI_DEV(0,0x1b,1), ht_c[i].devreg+3, reg8); -#endif } return reset_needed; diff -uNr ./freebios2/src/northbridge/amd/amdk8/northbridge.c ../freebios2/src/northbridge/amd/amdk8/northbridge.c --- ./freebios2/src/northbridge/amd/amdk8/northbridge.c 2004-05-24 12:04:47.000000000 -0700 +++ ../freebios2/src/northbridge/amd/amdk8/northbridge.c 2004-08-24 19:18:12.000000000 -0700 @@ -275,15 +275,16 @@ static unsigned amdk8_find_iopair(unsigned nodeid, unsigned link) { unsigned free_reg, reg; + uint32_t base, limit; free_reg = 0; for (reg = 0xc0; reg <= 0xd8; reg += 0x8) { - uint32_t base, limit; base = f1_read_config32(reg); limit = f1_read_config32(reg + 0x4); /* Do I have a free register */ if (!free_reg && ((base & 3) == 0)) { - free_reg = reg; + if( (base & 0x01fff000)!=0x01fff000 ) + free_reg = reg; } /* Do I have a match for this node and link? */ if (((base & 3) == 3) && @@ -296,6 +297,14 @@ if (reg > 0xd8) { reg = free_reg; } + + /* Mark reg has been used now */ + base = f1_read_config32(reg); + if( (base & 3) != 3 ) { + base |= 0x01fff000; + f1_write_config32(reg, base); + } + /* Return an available I/O pair or 0 on failure */ return reg; } @@ -303,16 +312,20 @@ static unsigned amdk8_find_mempair(unsigned nodeid, unsigned link) { unsigned free_reg, reg; + uint32_t base, limit; free_reg = 0; for (reg = 0x80; reg <= 0xb8; reg += 0x8) { - uint32_t base, limit; base = f1_read_config32(reg); limit = f1_read_config32(reg + 0x4); /* Do I have a free register */ if (!free_reg && ((base & 3) == 0)) { - free_reg = reg; + if( (base & 0xffffff00)!=0xffffff00 ) + free_reg = reg; } +#if 0 + printk_debug("nodid=%x, link=%x, reg=%x, base=%x, limit=%x, free_reg=%x\r\n", nodeid, link, reg, base, limit, free_reg); +#endif /* Do I have a match for this node and link? */ if (((base & 3) == 3) && ((limit & 7) == nodeid) && @@ -324,6 +337,17 @@ if (reg > 0xb8) { reg = free_reg; } + + /* Mark reg has been used now */ + base = f1_read_config32(reg); + if( (base & 3) != 3 ) { + base |= 0xffffff00; + f1_write_config32(reg, base); + } +#if 0 + printk_debug("result: nodid=%x, link=%x, reg=%x, free_reg=%x\r\n", nodeid, link, reg, free_reg); +#endif + /* Return an available I/O pair or 0 on failure */ return reg; } buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" diff -uNr ./freebios2/util/flash_and_burn/flash_rom.c ../freebios2/util/flash_and_burn/flash_rom.c --- ./freebios2/util/flash_and_burn/flash_rom.c 2004-09-30 09:37:01.000000000 -0700 +++ ../freebios2/util/flash_and_burn/flash_rom.c 2004-09-30 10:09:19.000000000 -0700 @@ -3,6 +3,8 @@ * * * Copyright 2000 Silicon Integrated System Corporation + * Copyright 2004 Tyan Corp + * yhlu yhlu@tyan.com add exclude start and end option * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -171,16 +177,20 @@ void usage(const char *name) { - printf("usage: %s [-rwv] [-c chipname][file]\n", name); + printf("usage: %s [-rwv] [-c chipname] [-s exclude_start] [-e exclude_end] [file]\n", name); printf("-r: read flash and save into file\n" "-w: write file into flash (default when file is specified)\n" "-v: verify flash against file\n" "-c: probe only for specified flash chip\n" + "-s: exclude start position\n" + "-e: exclude end postion\n" " If no file is specified, then all that happens\n" " is that flash info is dumped\n"); exit(1); } +int exclude_start_page, exclude_end_page; + int main(int argc, char *argv[]) { char *buf; @@ -191,9 +201,34 @@ int read_it = 0, write_it = 0, verify_it = 0, verbose = 0; char *filename = NULL; + + unsigned int exclude_start_position=0, exclude_end_position=0; // [x,y) + char *tempstr=NULL; +#if 0 + +#if 1 + /* Keep fallback image */ + exclude_start_position = 0x60000; + exclude_end_position = 0x80000; +#else + /* Keep DMI etc. */ + exclude_start_position = 0x60000; + exclude_end_position = 0x70000; +#endif + +#endif + + if (argc > 1) { + /* Yes, print them. */ + int i; + printf ("The arguments are:\n"); + for (i = 1; i < argc; ++i) + printf ("%s\n", argv[i]); + } + setbuf(stdout, NULL); - while ((opt = getopt(argc, argv, "rwvVc:")) != EOF) { + while ((opt = getopt(argc, argv, "rwvVc:s:e:")) != EOF) { switch (opt) { case 'r': read_it = 1; @@ -210,11 +245,22 @@ case 'V': verbose = 1; break; + case 's': + tempstr = strdup(optarg); + sscanf(tempstr,"%x",&exclude_start_position); + break; + case 'e': + tempstr = strdup(optarg); + sscanf(tempstr,"%x",&exclude_end_position); + break; + default: usage(argv[0]); break; } } + + if (read_it && write_it) { printf("-r and -w are mutually exclusive\n"); usage(argv[0]); @@ -255,6 +302,10 @@ memcpy(buf, (const char *) flash->virt_addr, size); else flash->read(flash, buf); + + if(exclude_end_position - exclude_start_position > 0) + memset(buf+exclude_start_position, 0, exclude_end_position-exclude_start_position); + fwrite(buf, sizeof(char), size, image); fclose(image); printf("done\n"); @@ -267,8 +318,19 @@ fclose(image); } - if (write_it || (!read_it && !verify_it)) + if(exclude_end_position - exclude_start_position > 0) + memcpy(buf+exclude_start_position, (const char *) flash->virt_addr+exclude_start_position, + exclude_end_position-exclude_start_position); + + exclude_start_page = exclude_start_position/flash->page_size; + if((exclude_start_position%flash->page_size) != 0) { + exclude_start_page++; + } + exclude_end_page = exclude_end_position/flash->page_size; + + if (write_it || (!read_it && !verify_it)) { flash->write(flash, buf); + } if (verify_it) verify_flash(flash, buf, verbose); return 0; diff -uNr ./freebios2/util/flash_and_burn/pm49fl004.c ../freebios2/util/flash_and_burn/pm49fl004.c --- ./freebios2/util/flash_and_burn/pm49fl004.c 2004-03-26 16:18:15.000000000 -0800 +++ ../freebios2/util/flash_and_burn/pm49fl004.c 2004-05-12 12:13:03.000000000 -0700 @@ -3,6 +3,7 @@ * * * Copyright 2004 Tyan Corporation + * yhlu yhlu@tyan.com add exclude range * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -55,15 +56,21 @@ return (0); } + +extern int exclude_start_page, exclude_end_page; + int write_49fl004(struct flashchip *flash, unsigned char *buf) { int i; int total_size = flash->total_size * 1024, page_size = flash->page_size; volatile char *bios = flash->virt_addr; - + printf("Programming Page: "); for (i = 0; i < total_size / page_size; i++) { + if( (i>=exclude_start_page) && (i