It's the same if you enable io apic. In the irq-table.
Add Entry Bus 1 for 8111 and 8131 Other 8131 bus may be discovered by Kernel. Regards YH -----Original Message----- From: Liu Tao [mailto:[EMAIL PROTECTED] Sent: Monday, October 18, 2004 2:50 AM To: YhLu Cc: Dave Aubin; [EMAIL PROTECTED] Subject: Re: PCI IRQ tables YhLu wrote: >SMP or single CPU? > >If SMP, and io apci is enabled, you may only focus on mptable.c and >irq-tables.c may only contain device that point to the peer roots bus. > >YH > > How about single CPU with IO-APIC enabled in linux? We are designing a new AMD64 mainboard and want to use linuxbios, the IO architecture is showed in the attached picture. I'm not sure how to specify the "PCI IRQ Router" in pirq table for this architecture. Since each AMD8131 and AMD8111 all provide legacy PIC mode interrupt controller, I think maybe there isn't a global legacy PIC mode PCI IRQ router for different NCHT channels? Maybe APIC is the better choice? Best Regards, Liu Tao _______________________________________________ Linuxbios mailing list [EMAIL PROTECTED] http://www.clustermatic.org/mailman/listinfo/linuxbios
