Li-Ta Lo <[EMAIL PROTECTED]> writes: > On Sat, 2004-10-16 at 11:03, Yinghai Lu wrote: > > So chip tree is merged into device tree. > > > > I'm eager to convert my MB to use that. > > > > Is there any problem for different inherent links in second K8? > > > > I am a little bit confused with that too. I think now the 'link' keyword > is not used anymore, the device enumeration code will put the 2nd > northbridge on the right LDT accroding to the early HT enumertion.
Sorry, for not making this clearer. Look at the generated static.c
if my following explanation does not clear things up.
The device tree from the HDAMA mainboard Config.lb is below:
The first time device pci 18.0 is mentioned that is link[0] in for the device.
The second time is link[1] the third time is link[2]...
And then the amdk8 code maps link[0] to LDT0 link[1] to LD[1 and link[2] to LDT2.
A similar condition exists for the phillips pca9545 i2c switch.
It only has one register but it has 4 downstream ports.
We may want to do something cleaner than just repeating the device once for
each ``link/bus'' but for now that works.
Eric
chip northbridge/amd/amdk8
device pci_domain 0 on
device pci 18.0 on # northbridge
# devices on link 0, link 0 == LDT 0
chip southbridge/amd/amd8131
# the on/off keyword is mandatory
device pci 0.0 on end
device pci 0.1 on end
device pci 1.0 on end
device pci 1.1 on end
end
chip southbridge/amd/amd8111
# this "device pci 0.0" is the parent the next one
# PCI bridge
device pci 0.0 on
device pci 0.0 on end
device pci 0.1 on end
device pci 0.2 on end
device pci 1.0 off end
end
device pci 1.0 on
chip superio/NSC/pc87360
device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
device pnp 2e.1 off # Parallel Port
io 0x60 = 0x378
irq 0x70 = 7
end
device pnp 2e.2 off # Com 2
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 2e.3 on # Com 1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.4 off end # SWC
device pnp 2e.5 off end # Mouse
device pnp 2e.6 on # Keyboard
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
end
device pnp 2e.7 off end # GPIO
device pnp 2e.8 off end # ACB
device pnp 2e.9 off end # FSCM
device pnp 2e.a off end # WDT
end
end
device pci 1.1 on end
device pci 1.2 on end
device pci 1.3 on
chip drivers/generic/generic
#phillips pca9545 smbus mux
device i2c 70 on
# analog_devices adm1026
chip drivers/generic/generic
device i2c 2c on end
end
end
device i2c 70 on end
device i2c 70 on end
device i2c 70 on end
end
chip drivers/generic/generic #dimm 0-0-0
device i2c 50 on end
end
chip drivers/generic/generic #dimm 0-0-1
device i2c 51 on end
end
chip drivers/generic/generic #dimm 0-1-0
device i2c 52 on end
end
chip drivers/generic/generic #dimm 0-1-1
device i2c 53 on end
end
chip drivers/generic/generic #dimm 1-0-0
device i2c 54 on end
end
chip drivers/generic/generic #dimm 1-0-1
device i2c 55 on end
end
chip drivers/generic/generic #dimm 1-1-0
device i2c 56 on end
end
chip drivers/generic/generic #dimm 1-1-1
device i2c 57 on end
end
end
device pci 1.5 off end
device pci 1.6 on end
end
end # device pci 18.0
device pci 18.0 on end # LDT1
device pci 18.0 on end # LDT2
device pci 18.1 on end
device pci 18.2 on end
device pci 18.3 on end
chip northbridge/amd/amdk8
device pci 19.0 on end
device pci 19.0 on end
device pci 19.0 on end
device pci 19.1 on end
device pci 19.2 on end
device pci 19.3 on end
end
end
device apic_cluster 0 on
chip cpu/amd/socket_940
device apic 0 on end
end
chip cpu/amd/socket_940
device apic 1 on end
end
end
end
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