On 12 Feb, Ronald G Minnich wrote: > On 12 Feb 2001, Eric W. Biederman wrote: > >> We should enable MTRR's for the RAM being tested in the RAM test. > ^^^^^^^ disable? don't you want the writes to go to ram, not > be cached? I think that should be an option. I ran it both ways before getting things straightened out. Ty -- Tyson D Sawyer iRobot Corporation Senior Systems Engineer Real World Interface Div. [EMAIL PROTECTED] Robots for the Real World 603-532-6900 ext 206 http://www.irobot.com
- Re: 440BX-Board (GA-6BXS) and SDRAM initialisation ... Ronald G Minnich
- Re: 440BX-Board (GA-6BXS) and SDRAM initialisation .... tyson
- Re: 440BX-Board (GA-6BXS) and SDRAM initialisation .... tyson
- Re: 440BX-Board (GA-6BXS) and SDRAM initialisation .... tyson
- Re: 440BX-Board (GA-6BXS) and SDRAM initialisation .... tyson
- Re: 440BX-Board (GA-6BXS) and SDRAM initialisati... Richard A. Smith