On Tue, 2002-07-02 at 15:55, Eric W. Biederman wrote: > ollie lho <[EMAIL PROTECTED]> writes: > > > On Tue, 2002-07-02 at 15:35, Eric W. Biederman wrote: > > > [EMAIL PROTECTED] (Eric W. Biederman) writes: > > > > > > > - Initial support for > 2G ram. > > > > - Sizeram now returns a list of valid ranges of ram > > > > - pci resource allocation now starts at 0xC0000000 > > > > > > Ollie my simplified mtrr.c code has one a performance regression. It > > > currently does not do the overlapping large WB mtrrs with small UC > > > mtrrs tric. It only used WB mtrrs, currently. > > > > > > > Did you handle the case that the start address of a certain memory > > region is not properly aligned as MTRR want ?? > > Yes, I use a smaller MTRR in that case. I don't think your older > code handled that, at least not in the general case. >
Can we use a big WB mtrr to cover the whole memory and use several UC to cover the memory holes ?? Ollie
