Miernik wrote: > What is the transfer rate and latency of the interface between the CPU > and the BIOS socket in motherboards like Via Epia or Tyan Opteron > boards? > > What I am thinking to do is to put very fast SRAM there (it should work, > shouldn't it?), battery backed up of course, and run the LinuxBIOS and > kernel XiP eXecute in Place (without copying to RAM). Would that work? > Imagine I could put 8 MB of fast SRAM there.
won't help. The timing is set by chipset. faster part won't run faster. I wish it would. ron -- linuxbios mailing list [email protected] http://www.openbios.org/mailman/listinfo/linuxbios
