Hi, On Wed, Mar 14, 2007 at 01:52:06AM -0400, Corey Osgood wrote: > > OK, I tried this code today on an MSI K7T Turbo (MS-6330), which uses > > the VT82C686B southbridge. > > > > I didn't manage to get serial output with this code, yet. I verified > > that I can boot Linux with the proprietary BIOS and that I can use > > minicom for serial connections to another PC (COM1, 115200 bps, 8N1).
Yay, progress.
With the attached patch I get serial output on my board on serial port 1.
I didn't try COM2, yet.
Not quite sure what the initial problem was, but the current code works
for me. Corey, can you please verify whether it still works on your board?
I made some changes here and there (mostly cosmetic), but maybe I broke
some parts of the code, so please verify on your hardware...
If it works (and if you don't spot further problems in the code) I'd say this
can be committed. Please send an Acked-by if the code looks good to you.
> > I guess we can keep the code in src/southbridge/via for now (instead of
> > src/superio/via), I'm still undecided which is better here, but
> > we can always move the code later...
> >
>
> If it does get moved, then via vt8231 and vt8235 should also have their
> super i/o functions moved, to avoid confusion and keep consistent.
Yes, the current status is not consistent. We should agree upon one
method to do it. In v1 the vt82c686 in separated into southbridge/superio,
but on v2 the vt8231 (for example) is not separated...
> At line 95 (or around there), try changing it to this, if it still
> doesn't work after the above fix:
>
> if ( dev == PCI_DEV_INVALID ) {
> dev = PCI_DEV(0, 7, 0);
> }
This part worked fine I think, or at least it does in my current patch.
I commented the following lines, they only set values which are already
defaults. I also tested this on real hardware, commenting the lines
doesn't prevent serial output from working...
Uwe.
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Add initial pre-RAM serial output support for the VIA VT82C686(A/B) southbridge (with integrated Super-I/O). Signed-off-by: Corey Osgood <[EMAIL PROTECTED]> Signed-off-by: Uwe Hermann <[EMAIL PROTECTED]> Index: src/southbridge/via/vt82c686/vt82c686.h =================================================================== --- src/southbridge/via/vt82c686/vt82c686.h (Revision 0) +++ src/southbridge/via/vt82c686/vt82c686.h (Revision 0) @@ -0,0 +1,56 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2007 Corey Osgood <[EMAIL PROTECTED]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Datasheets: + * Name: VT82C686A "Super South" South Bridge + * Link: http://www.datasheets.org.uk/datasheet.php?article=3510260 + * Name: VT82C686B "Super South" South Bridge + * Link: http://www.datasheet4u.com/html/V/T/8/VT82C686B_VIA.pdf.html + */ + +/* Super I/0 Configuration Registers. */ +/* Any registers not listed here are reserved. */ +#define VT82C686_SIO_DEV_ID 0xe0 /* Super-I/O Device ID */ +#define VT82C686_SIO_REV 0xe1 /* Super-I/O Device Revision */ +#define VT82C686_FS 0xe2 /* Function Select */ +#define VT82C686_FDC 0xe3 /* Floppy */ +#define VT82C686_PP 0xe6 /* Parallel Port */ +#define VT82C686_SP1 0xe7 /* Serial Port 1 */ +#define VT82C686_SP2 0xe8 /* Serial Port 2 */ +#define VT82C686_SP_CFG 0xee /* Serial Port Configuration */ +#define VT82C686_POWER 0xef /* Power Down Control */ +#define VT82C686_PP_CTRL 0xf0 /* Parallel Port Control */ +#define VT82C686_SP_CTRL 0xf1 /* Serial Port Control */ +#define VT82C686_FDC_CFG 0xf6 /* Floppy Controller Configuration */ +#define VT82C686_FDC_DC 0xf8 /* Floppy Drive Control */ +#define VT82C686_GPIO 0xfc /* General Purpose I/O */ + +/* For reference, used PCI IDs and their names in pci_ids.h: */ +/* +PCI_VENDOR_ID_VIA 0x1106 +PCI_DEVICE_ID_VIA_82C686 0x0686 // Function 0, PCI Config +PCI_DEVICE_ID_VIA_82C586_1 0x0571 // Function 1, IDE Controller +PCI_DEVICE_ID_VIA_82C586_2 0x3038 // Functions 2 & 3, USB Ports 0-1 & 2-3 +PCI_DEVICE_ID_VIA_82C586_3 0x3040 // Possible 2nd USB Controller? +PCI_DEVICE_ID_VIA_82C686_4 0x3057 // Function 4, Power Management +PCI_DEVICE_ID_VIA_82C686_5 0x3058 // Function 5, AC'97 Codec +PCI_DEVICE_ID_VIA_82C686_6 0x3068 // Function 6, MC'97 Codec +*/ + Index: src/southbridge/via/vt82c686/Config.lb =================================================================== --- src/southbridge/via/vt82c686/Config.lb (Revision 0) +++ src/southbridge/via/vt82c686/Config.lb (Revision 0) @@ -0,0 +1,22 @@ +## +## This file is part of the LinuxBIOS project. +## +## Copyright (C) 2007 Corey Osgood <[EMAIL PROTECTED]> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +config chip.h + Index: src/southbridge/via/vt82c686/vt82c686_early_serial.c =================================================================== --- src/southbridge/via/vt82c686/vt82c686_early_serial.c (Revision 0) +++ src/southbridge/via/vt82c686/vt82c686_early_serial.c (Revision 0) @@ -0,0 +1,92 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2006-2007 Uwe Hermann <[EMAIL PROTECTED]> + * Copyright (C) 2007 Corey Osgood <[EMAIL PROTECTED]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* This has been ported to the VIA VT82C686(A/B) from the SMSC FDC37M60x + * by Corey Osgood. See vt82c686.h for more information. */ + +#include <arch/romcc_io.h> +#include <device/pci_ids.h> +#include "vt82c686.h" + +#define SIO_INDEX 0x3f0 +#define SIO_DATA 0x3f1 + +/** + * Configure the chip by writing the byte 'value' into the register + * specified by 'index'. + * + * @param index The index of the register to modify. + * @param value The value to write into the register. + */ +static void vt82c686_sio_write(uint8_t index, uint8_t value) +{ + outb(index, SIO_INDEX); + outb(value, SIO_DATA); +} + +/** + * Enable the serial port(s) of the VT82C686(A/B) Super I/O chip. + * + * @param dev TODO + * @param iobase TODO + */ +static void vt82c686_enable_serial(device_t dev, unsigned iobase) +{ + uint8_t reg; + device_t sbdev; + + /* TODO: Use info from 'dev' and 'iobase'. */ + /* TODO: Only enable one serial port (depending on config) or both? */ + + /* (1) Enter configuration mode (set Function 0 Rx85[1] = 1). */ + + /* Find the southbridge. Die upon error. */ + sbdev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, + PCI_DEVICE_ID_VIA_82C686), 0); + // sbdev = PCI_DEV(0, 7, 0); + if (sbdev == PCI_DEV_INVALID) { + /* Serial output is not yet working at this point, but + * die() emits the POST code 0xff and halts the CPU, too. */ + die("Southbridge not found.\r\n"); + } + + /* Enable Super-I/O (bit 0) and Super-I/O Configuration (bit 1). */ + reg = pci_read_config8(sbdev, 0x85); + pci_write_config8(sbdev, 0x85, reg | 0x3); /* Set bits 0 and 1. */ + + /* (2) Configure the chip. */ + + /* Enable serial port 1 (set bit 2) and 2 (set bit 3). */ + vt82c686_sio_write(VT82C686_FS, 0xf); + + // vt82c686_sio_write(VT82C686_POWER, 0x00); /* No powerdown */ + // vt82c686_sio_write(VT82C686_SP_CTRL, 0x00); /* Normal operation */ + vt82c686_sio_write(VT82C686_SP1, 0xfe); /* SP1: 0x3f8 */ + vt82c686_sio_write(VT82C686_SP2, 0xbe); /* SP2: 0x2f8 */ + + /* Enable high speed on serial port 1 (set bit 6) and 2 (set bit 7). */ + vt82c686_sio_write(VT82C686_SP_CFG, 0xc0); + + /* (3) Exit configuration mode (set Function 0 Rx85[1] = 0). */ + reg = pci_read_config8(sbdev, 0x85); + pci_write_config8(sbdev, 0x85, reg & 0xfd); /* Clear bit 1. */ +} + Index: src/southbridge/via/vt82c686/chip.h =================================================================== --- src/southbridge/via/vt82c686/chip.h (Revision 0) +++ src/southbridge/via/vt82c686/chip.h (Revision 0) @@ -0,0 +1,35 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2007 Corey Osgood <[EMAIL PROTECTED]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _SUPERIO_VIA_VT82C686 +#define _SUPERIO_VIA_VT82C686 + +#include <device/device.h> +#include <pc80/keyboard.h> +#include <uart8250.h> + +extern struct chip_operations superio_via_vt82c686_ops; + +struct superio_via_vt82c686_config { + struct uart8250 com1, com2; + struct pc_keyboard keyboard; +}; + +#endif /* _SUPERIO_VIA_VT82C686 */
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