On Fri, 2007-04-27 at 00:01 -0700, roger wrote:
> I just used Uwe's Tyan S1846 tree and everything *just* worked. :-)
>
> However, I don't mean everything worked.
>
>
> I've attached a log file of the boot for those curious.
>
> Here's Failure #1 - DRAM Verify Failure
> --- Begin Snip ---
> DRAM filled
> DRAM verify: 00000000-04000000
> 00000000 00010000 00020000 00030000 00040000 00050000 00060000 00070000
> 00080000 00090000 000a0000 F
> ail: @0x000a0000 Read value=0xffffffff
> Fail: @0x000a0004 Read value=0xffffffff
> Fail: @0x000a0008 Read value=0xffffffff
> ...
> Known issue, I figured you already knew. Ram init is very much broken
on
> the i440bx northbridge.
> 0xa0000 looks more like video memory to me.
> try checking 0-0x9ffff and 100000-TOM
[Attached full log of LinuxBIOSv2 output.]
Error #1 of 2 (DRAM Succeeds):
Ok. I've set the following in tyan/s1846/auto.c:
/* Check 64 MB of RAM. */
/*ram_check(0x00000000, 0x04000000);*/
ram_check(0,0x9ffff);
/*ram_check(100000,TOM);*/
Should I try also (100000,TOM) or is it satisfactory once DRAM succeeds?
--- Snip of Currect LinuxBIOSv2 Output ---
Testing DRAM : 00000000-0009ffff
DRAM fill: 00000000-0009ffff
00000000 00010000 00020000 00030000 00040000 00050000 00060000 00070000
00080000 00090000 000a0000
DRAM filled
DRAM verify: 00000000-0009ffff
00000000 00010000 00020000 00030000 00040000 00050000 00060000 00070000
00080000 00090000 000a0000
DRAM range verified.
Done.
--- End of Snip ---
Error #2 of 2 (PCI Bus Error):
(I've yet to google for this.)
--- Snip of PCI Bus Error ---
Finding PCI configuration type.
PCI: Using configuration type 1
PCI_DOMAIN: 0000 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 Cannot find pci bus operations
--- End of Snip ---
--
Roger
http://www.eskimo.com/~roger/index.html
Key fingerprint = 8977 A252 2623 F567 70CD 1261 640F C963 1005 1D61
Fri Apr 27 11:50:24 PDT 2007
LinuxBIOS-2.0.0.0Fallback Fri Apr 27 11:19:10 PDT 2007 starting...
SMBus controller enabled
dimm: 00.0: 50
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
dimm: 01.0: 51
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
dimm: 02.0: 52
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
dimm: 03.0: 53
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Ram1.00
Northbridge prior to SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 00 00 00
10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 04 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00
60: 01 01 01 01 01 01 01 01 00 00 00 00 00 00 00 00
70: 00 1f 02 38 00 00 00 00 00 00 00 38 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 18 0c 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00
Set register 0x00000050 to 0xff00a00c
Set register 0x00000057 to 0x00000008
Set register 0x00000059 to 0x00000000
Set register 0x0000005a to 0x00000000
Set register 0x0000005b to 0x00000000
Set register 0x0000005c to 0x00000000
Set register 0x0000005d to 0x00000000
Set register 0x0000005e to 0x00000000
Set register 0x0000005f to 0x00000000
Set register 0x00000060 to 0x00000000
Set register 0x00000061 to 0x00000000
Set register 0x00000062 to 0x00000000
Set register 0x00000063 to 0x00000000
Set register 0x00000064 to 0x00000000
Set register 0x00000065 to 0x00000000
Set register 0x00000066 to 0x00000000
Set register 0x00000067 to 0x00000000
Set register 0x00000068 to 0x00000000
Set register 0x00000074 to 0x00000000
Set register 0x00000076 to 0x00000000
Set register 0x00000078 to 0x0000ff00
Set register 0x0000007a to 0x00000000
Ram2.00
Ram3
RAM Enable 1: Apply NOP
Sending RAM command 0x0020 to 0x00000000
RAM Enable 2: Precharge all
Sending RAM command 0x0040 to 0x00000000
RAM Enable 3: CBR
Sending RAM command 0x0080 to 0x00000000
Sending RAM command 0x0080 to 0x00000000
Sending RAM command 0x0080 to 0x00000000
Sending RAM command 0x0080 to 0x00000000
Sending RAM command 0x0080 to 0x00000000
Sending RAM command 0x0080 to 0x00000000
Sending RAM command 0x0080 to 0x00000000
Sending RAM command 0x0080 to 0x00000000
RAM Enable 4: Mode register set
Sending RAM command 0x0060 to 0x000001d0
RAM Enable 5: Normal operation
Sending RAM command 0x0000 to 0x00000000
RAM Enable 6: Enable refresh
Enabling refresh (DRAMC = 0x09) for DIMM 00
Enabling refresh (DRAMC = 0x09) for DIMM 01
Enabling refresh (DRAMC = 0x09) for DIMM 02
Enabling refresh (DRAMC = 0x09) for DIMM 03
Northbridge following SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 00 00 00
10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 08 00 00 09 00 00 00 00 00 00 00 00
60: 08 08 08 08 08 08 08 08 00 00 00 00 00 00 00 00
70: 00 1f 02 38 01 00 00 00 07 01 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 18 0c 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00
Ram4
Testing DRAM : 00000000-0009ffff
DRAM fill: 00000000-0009ffff
00000000 00010000 00020000 00030000 00040000 00050000 00060000 00070000 00080000 00090000 000a0000
DRAM filled
DRAM verify: 00000000-0009ffff
00000000 00010000 00020000 00030000 00040000 00050000 00060000 00070000 00080000 00090000 000a0000
DRAM range verified.
Done.
Copying LinuxBIOS to RAM.
Jumping to LinuxBIOS.
LinuxBIOS-2.0.0.0Fallback Fri Apr 27 11:19:10 PDT 2007 booting...
end 12be74c4, start 1
32-bit delta 1645
calibrate_tsc 32-bit result is 1645
clocks_per_usec: 1645
Enumerating buses...
scan_static_bus for Root Device
Finding PCI configuration type.
PCI: Using configuration type 1
PCI_DOMAIN: 0000 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 Cannot find pci bus operations--
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