This fix properly hides the UDC and OTG PCI headers when the cs5536 is
setup as the host on USB port4. In client mode the headers remain
available. Also fixes an outb to 0x80 to use the post_code() function.
Signed-off-by: Marc Jones <[EMAIL PROTECTED]>
--
Marc Jones
Senior Software Engineer
(970) 226-9684 Office
mailto:[EMAIL PROTECTED]
http://www.amd.com/embeddedprocessors
Index: LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c
===================================================================
--- LinuxBIOSv2.orig/src/southbridge/amd/cs5536/cs5536.c 2007-05-10
17:36:08.000000000 -0600
+++ LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2007-05-10
16:40:49.000000000 -0600
@@ -487,13 +487,13 @@
dev = dev_find_device(PCI_VENDOR_ID_AMD,
PCI_DEVICE_ID_AMD_CS5536_UDC, 0);
if (dev) {
- pci_write_config8(dev, 0x7C, 0xDEADBEEF);
+ pci_write_config32(dev, 0x7C, 0xDEADBEEF);
}
dev = dev_find_device(PCI_VENDOR_ID_AMD,
PCI_DEVICE_ID_AMD_CS5536_OTG, 0);
if (dev) {
- pci_write_config8(dev, 0x7C, 0xDEADBEEF);
+ pci_write_config32(dev, 0x7C, 0xDEADBEEF);
}
}
@@ -512,7 +512,7 @@
(struct southbridge_amd_cs5536_config *)dev->chip_info;
struct msrinit *csi;
- outb(P80_CHIPSET_INIT, 0x80);
+ post_code(P80_CHIPSET_INIT);
/* we hope NEVER to be in linuxbios when S3 resumes
if (! IsS3Resume()) */
--
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