Peter Stuge wrote:
> On Tue, May 22, 2007 at 02:23:30PM +0100, Ceri wrote:
>> Comments pls?
>
> Have you had a chance to test it?
>
>
>> + NBXCFG, 0x00000000, 0xff00a00c,PCI_REGISTER_32BIT,
> [..]
>> + FDHC, 0x00, 0x00, PCI_REGISTER_8BIT,
>
>
>> + for (i = 0; i < max; i += 4) {
>> + switch(register_values[i+3]){
>> + case PCI_REGISTER_8BIT: reg =
>> pci_read_config8(ctrl->d0, register_values[i]); break;
>> + case PCI_REGISTER_16BIT: reg =
>> pci_read_config16(ctrl->d0, register_values[i]);break;
>> + case PCI_REGISTER_32BIT: reg =
>> pci_read_config32(ctrl->d0, register_values[i]);break;
>> + default: print_debug("Invalid PCI register size in
>> table\n");
>> + }
>> +
>
> Please use more lines and the kernel switch style.
>
> switch () {
> case ..REG_8:
> reg = ...
> break;
> case ..REG_16:
> ..
> break;
> }
>
> Maybe even use different temporary storage for different lengths.
>
>
> //Peter
>
No problem, I have changed the switch statement style.
I wanted to limit the number of temp's used as I didn't want ROMCC
complaining about no more registers available.
I have tested it in VMWare and it works fine. I don't have a 440bx
mainboard at hand at the moment to test real hardware, anyone have p2b
or similar at hand to test the patch?
Thanks
C
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