* Uwe Hermann <[EMAIL PROTECTED]> [070528 02:40]:
> Lower the RAM init delays we use on the Intel 440BX.
>
> As per JEDEC, we should wait 200us until voltages and clocks are stable.
> Then apply NOPs for 200 clock cycles (for simplicity we use 200us here).
>
> All other delays are so low that we get away with just waiting 1us.
>
> Signed-off-by: Uwe Hermann <[EMAIL PROTECTED]>
Acked-by: Stefan Reinauer <[EMAIL PROTECTED]>
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