> Ok, then this should probably go into a x3455 board specific code > instead. I saw Yinghai made a lot of io to those ports in the ht1000 > specific code, so I assumed thats southbridge specific code. these regs are also used for other things; but these two accesses are GPIOs.
> The weird thing is that I could overwrite some parts of the flash > without that code (0x70000 to 0x80000), so it's probably not the flash > write line. The flash has two signals regarding write protection, WP# und TBL#, write protect und top boot lock, one protecting the lower parts of the device, the other protecting the high part; so maybe only part of the flash is protected here... > Or, it might be the FPGA on board catches the area from 0x70000 to > 0x80000 and decides whether to switch or not. I have no information on > that, unfortunately, and I doubt I will be able to get it in a timely > manner. ok that is the other possibility > I will prepare something to make this board dependent. Thank you very > much for the feedback. we'll then also start posting patches for the board we are working on Regards, Mondrian -- Mondrian Nuessle University of Mannheim Phone: +49 621 181 2717 Computer Architecture Group Fax: +49 621 181 2713 http://ra.ti.uni-mannheim.de mailto:[EMAIL PROTECTED] -- linuxbios mailing list [email protected] http://www.linuxbios.org/mailman/listinfo/linuxbios
