See patch.

Uwe.
-- 
http://www.hermann-uwe.de  | http://www.holsham-traders.de
http://www.crazy-hacks.org | http://www.unmaintained-free-software.org
Fix the static device tree of the ASI MB-5BLMP target. This was broken in
more than just one way. This version should be (more) correct.

Signed-off-by: Uwe Hermann <[EMAIL PROTECTED]>

Index: src/mainboard/asi/mb_5blmp/Config.lb
===================================================================
--- src/mainboard/asi/mb_5blmp/Config.lb	(Revision 2714)
+++ src/mainboard/asi/mb_5blmp/Config.lb	(Arbeitskopie)
@@ -128,67 +128,43 @@
 
 chip northbridge/amd/gx1		# Northbridge
   device pci_domain 0 on
-    device pci 0.0 on end
-      chip southbridge/amd/cs5530	# Southbridge
-        device pci 12.0 on
-          chip superio/nsc/pc87351	# Super I/O
-            device pnp 2e.0 on		# PIC
-               io 0x60 = 0x20
-               io 0x62 = 0xa0
-               irq 0x70 = 2
-            end
-            device pnp 2e.1 on		# DMA
-            end
-            device pnp 2e.2 on		# System Timer
-               io 0x60 = 0x40
-               irq 0x70 = 0
-            end
-            device pnp 2e.3 on		# RTC
-               io 0x60 = 0x70
-               irq 0x70 = 8
-            end
-            device pnp 2e.4 on		# Keyboard + Mouse
-               io 0x60 = 0x60
-               io 0x62 = 0x64
-               irq 0x70 = 1
-               irq 0x72 = 12
-            end
-            device pnp 2e.5 on		# PC Speaker
-            end
-            device pnp 2e.6 on		# Math Coprocessor (FPU)
-               io 0x60 = 0xf0
-               irq 0x70 = 13
-            end
-            device pnp 2e.7 on		# System board
-            end
-            device pnp 2e.8 on		# Motherboard resources
-            end
-            device pnp 2e.9 on		# PCI bus
-            end
-            device pnp 2e.c on		# Motherboard resources
-            end
-            device pnp 2e.d on		# Motherboard resources
-            end
-            device pnp 2e.e on		# COM1
-               io 0x60 = 0x3f8
-               irq 0x70 = 4
-            end
-            device pnp 2e.f off		# FDC
-            end
-            device pnp 2e.10 on		# Parallel port
-               io 0x60 = 0x378
-               irq 0x70 = 7
-            end
-            device pnp 2e.12 on		# COM2
-               io 0x60 = 0x2f8
-               irq 0x70 = 3
-            end
+    device pci 0.0 on end		# Host bridge
+    chip southbridge/amd/cs5530		# Southbridge
+      device pci 0f.0 off end		# Ethernet (Realtek RTL8139B)
+      device pci 12.0 on		# ISA bridge
+        chip superio/nsc/pc87351	# Super I/O
+          device pnp 2e.4 on		# PS/2 keyboard (+ mouse?)
+            io 0x60 = 0x60
+            io 0x62 = 0x64
+            irq 0x70 = 1
+            # irq 0x72 = 12
           end
-        device pci 12.1 off end		# SMI
-        device pci 12.2 on  end		# IDE
-        device pci 12.3 off end 	# Audio
-        device pci 12.4 off end		# Video (VGA)
+          device pnp 2e.a on		# PS/2 mouse
+            irq 0x70 = 12
+          end
+          device pnp 2e.e on		# COM1
+            io 0x60 = 0x3f8
+            irq 0x70 = 4
+          end
+          device pnp 2e.f off		# Floppy
+            io 0x60 = 0x3f2
+            irq 0x70 = 6
+            drq 0x74 = 2
+          end
+          device pnp 2e.10 on		# Parallel port
+            io 0x60 = 0x378
+            irq 0x70 = 7
+          end
+          device pnp 2e.12 on		# COM2
+            io 0x60 = 0x2f8
+            irq 0x70 = 3
+          end
+        end
       end
+      device pci 12.1 off end		# SMI
+      device pci 12.2 on  end		# IDE
+      device pci 12.3 on  end		# Audio
+      device pci 12.4 on  end		# VGA (onboard)
       # device pci 12.4 on		# VGA (onboard)
       #   chip drivers/pci/onboard
       #     device pci 12.4 on end
@@ -197,13 +173,12 @@
       #     # register "rom_address" = "0xfff00000" # 1 MB image
       #   end
       # end
-      device pci 0f.0 off end		# Ethernet (Realtek RTL8139B)
       device pci 13.0 on end		# USB
+      register "ide0_enable" = "1"
+      register "ide1_enable" = "1"
     end
   end
-
   chip cpu/amd/model_gx1		# CPU
   end
-
 end
 

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