Author: uwe
Date: 2007-07-11 21:47:36 +0200 (Wed, 11 Jul 2007)
New Revision: 446
Modified:
LinuxBIOSv3/northbridge/amd/geodelx/raminit.c
Log:
Simplify the Geode LX RAM init code a bit by using (inline'd) helper
functions. Untested on real hardware, but it still compiles.
Signed-off-by: Uwe Hermann <[EMAIL PROTECTED]>
Acked-by: Marc Jones <[EMAIL PROTECTED]>
Modified: LinuxBIOSv3/northbridge/amd/geodelx/raminit.c
===================================================================
--- LinuxBIOSv3/northbridge/amd/geodelx/raminit.c 2007-07-11 19:42:21 UTC
(rev 445)
+++ LinuxBIOSv3/northbridge/amd/geodelx/raminit.c 2007-07-11 19:47:36 UTC
(rev 446)
@@ -362,6 +362,27 @@
wrmsr(MC_CF8F_DATA, msr);
}
+static inline void helper_spd(u8 dimm0, u8 dimm1, u8 addr, u8 *spd0, u8 *spd1)
+{
+ *spd0 = smbus_read_byte(dimm0, addr);
+ if (*spd0 == 0xFF)
+ *spd0 = 0;
+ *spd1 = smbus_read_byte(dimm1, addr);
+ if (*spd1 == 0xFF)
+ *spd1 = 0;
+ if (*spd0 < *spd1)
+ *spd0 = *spd1;
+}
+
+static inline void helper_calc(u8 *spd0, u8 *spd1, u32 memspeed)
+{
+ /* (ns/(1/MHz) = (us*MHZ)/1000 = clocks/1000 = clocks) */
+ *spd1 = ((*spd0 >> 2) * memspeed) / 1000;
+ if ((((*spd0 >> 2) * memspeed) % 1000)) {
+ ++(*spd1);
+ }
+}
+
/**
* Set latencies for DRAM.
*
@@ -382,70 +403,27 @@
/* MC_CF8F setup */
/* tRAS */
- spd_byte0 = smbus_read_byte(dimm0, SPD_tRAS);
- if (spd_byte0 == 0xFF)
- spd_byte0 = 0;
- spd_byte1 = smbus_read_byte(dimm1, SPD_tRAS);
- if (spd_byte1 == 0xFF)
- spd_byte1 = 0;
- if (spd_byte0 < spd_byte1)
- spd_byte0 = spd_byte1;
-
+ helper_spd(dimm0, dimm1, SPD_tRAS, &spd_byte0, &spd_byte1);
/* (ns/(1/MHz) = (us*MHZ)/1000 = clocks/1000 = clocks) */
+ /* TODO: This calculation is a bit different. On purpose or bug? */
spd_byte1 = (spd_byte0 * memspeed) / 1000;
if (((spd_byte0 * memspeed) % 1000))
++spd_byte1;
dimm_setting |= spd_byte1 << CF8F_LOWER_ACT2PRE_SHIFT;
/* tRP */
- spd_byte0 = smbus_read_byte(dimm0, SPD_tRP);
- if (spd_byte0 == 0xFF)
- spd_byte0 = 0;
- spd_byte1 = smbus_read_byte(dimm1, SPD_tRP);
- if (spd_byte1 == 0xFF)
- spd_byte1 = 0;
- if (spd_byte0 < spd_byte1)
- spd_byte0 = spd_byte1;
-
- /* (ns/(1/MHz) = (us*MHZ)/1000 = clocks/1000 = clocks) */
- spd_byte1 = ((spd_byte0 >> 2) * memspeed) / 1000;
- if ((((spd_byte0 >> 2) * memspeed) % 1000)) {
- ++spd_byte1;
- }
+ helper_spd(dimm0, dimm1, SPD_tRP, &spd_byte0, &spd_byte1);
+ helper_calc(&spd_byte0, &spd_byte1, memspeed);
dimm_setting |= spd_byte1 << CF8F_LOWER_PRE2ACT_SHIFT;
/* tRCD */
- spd_byte0 = smbus_read_byte(dimm0, SPD_tRCD);
- if (spd_byte0 == 0xFF)
- spd_byte0 = 0;
- spd_byte1 = smbus_read_byte(dimm1, SPD_tRCD);
- if (spd_byte1 == 0xFF)
- spd_byte1 = 0;
- if (spd_byte0 < spd_byte1)
- spd_byte0 = spd_byte1;
-
- /* (ns/(1/MHz) = (us*MHZ)/1000 = clocks/1000 = clocks) */
- spd_byte1 = ((spd_byte0 >> 2) * memspeed) / 1000;
- if ((((spd_byte0 >> 2) * memspeed) % 1000)) {
- ++spd_byte1;
- }
+ helper_spd(dimm0, dimm1, SPD_tRCD, &spd_byte0, &spd_byte1);
+ helper_calc(&spd_byte0, &spd_byte1, memspeed);
dimm_setting |= spd_byte1 << CF8F_LOWER_ACT2CMD_SHIFT;
/* tRRD */
- spd_byte0 = smbus_read_byte(dimm0, SPD_tRRD);
- if (spd_byte0 == 0xFF)
- spd_byte0 = 0;
- spd_byte1 = smbus_read_byte(dimm1, SPD_tRRD);
- if (spd_byte1 == 0xFF)
- spd_byte1 = 0;
- if (spd_byte0 < spd_byte1)
- spd_byte0 = spd_byte1;
-
- /* (ns/(1/MHz) = (us*MHZ)/1000 = clocks/1000 = clocks) */
- spd_byte1 = ((spd_byte0 >> 2) * memspeed) / 1000;
- if ((((spd_byte0 >> 2) * memspeed) % 1000)) {
- ++spd_byte1;
- }
+ helper_spd(dimm0, dimm1, SPD_tRRD, &spd_byte0, &spd_byte1);
+ helper_calc(&spd_byte0, &spd_byte1, memspeed);
dimm_setting |= spd_byte1 << CF8F_LOWER_ACT2ACT_SHIFT;
/* tRC = tRP + tRAS */
@@ -461,14 +439,7 @@
/* MC_CF1017 setup */
/* tRFC */
- spd_byte0 = smbus_read_byte(dimm0, SPD_tRFC);
- if (spd_byte0 == 0xFF)
- spd_byte0 = 0;
- spd_byte1 = smbus_read_byte(dimm1, SPD_tRFC);
- if (spd_byte1 == 0xFF)
- spd_byte1 = 0;
- if (spd_byte0 < spd_byte1)
- spd_byte0 = spd_byte1;
+ helper_spd(dimm0, dimm1, SPD_tRFC, &spd_byte0, &spd_byte1);
if (spd_byte0) {
/* (ns/(1/MHz) = (us*MHZ)/1000 = clocks/1000 = clocks) */
--
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