Hi,

here's an initial take at support for the ASUS A8NE-FM. There's still
some work to be done, but it already boots up to a console, so if
anybody has the same board and want to play with it, go ahead!

The interesting thing is that this board seems to be one of the few ASUS
boards which does _not_ require custom flashrom hackery, it works out
of the box.


Uwe.
-- 
http://www.hermann-uwe.de  | http://www.holsham-traders.de
http://www.crazy-hacks.org | http://www.unmaintained-free-software.org
Initial support for the ASUS A8NE-FM (seems to be an OEM board, sold by
Fujitsu-Siemens), for testing purposes only.

This is a patch against the A8N-E target for now, as they're very similar.

The following hardware works fine already:
 - USB (tested with USB thumb drive and USB mouse)
 - IDE (also CompactFlash-to-IDE adapter)
 - PS/2 keyboard
 - PS/2 mouse
 - PCI VGA card (X11 works)
 - Serial console (COM1, COM2)

The following doesn't yet work (probably due to MPTable/IRQ table):
 - On-board ethernet
 - On-board sound

Untested:
 - Parallel port
 - Floppy
 - On-board Firewire
 - SATA drives

The change in ck804_early_setup.c is quite likely fixing a bug.

The change in src/northbridge/amd/amdk8/raminit.c is required, as that
routine falsely detects an Opteron (this is a Socket 939 Athlon 64).

Even with
  #define CK804_USE_NIC 1
the network card doesn't seem to work (IRQ tables, I guess?)

Signed-off-by: Uwe Hermann <[EMAIL PROTECTED]>

Index: src/southbridge/nvidia/ck804/ck804_early_setup.c
===================================================================
--- src/southbridge/nvidia/ck804/ck804_early_setup.c	(Revision 2739)
+++ src/southbridge/nvidia/ck804/ck804_early_setup.c	(Arbeitskopie)
@@ -279,7 +279,7 @@
                 RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+19, ~(0xff),  ((0<<4)|(1<<2)|(0<<0)),  
                 RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 3, ~(0xff),  ((0<<4)|(1<<2)|(0<<0)),  
                 RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 3, ~(0xff),  ((0<<4)|(1<<2)|(1<<0)),  
-		RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804B_DEVN_BASE+1 , 0, 0xe4), ~(1<<23), (1<<23);
+		RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804B_DEVN_BASE+1 , 0, 0xe4), ~(1<<23), (1<<23),
 #endif
 
 #if CK804_USE_ACI == 1
Index: src/mainboard/asus/a8n_e/Config.lb
===================================================================
--- src/mainboard/asus/a8n_e/Config.lb	(Revision 2739)
+++ src/mainboard/asus/a8n_e/Config.lb	(Arbeitskopie)
@@ -231,123 +231,82 @@
 end
 
 chip northbridge/amd/amdk8/root_complex
-	device apic_cluster 0 on
-		chip cpu/amd/socket_939
-			device apic 0 on end
-		end
-	end
+  device apic_cluster 0 on
+    chip cpu/amd/socket_939
+      device apic 0 on end
+    end
+  end
 
-	device pci_domain 0 on
-		chip northbridge/amd/amdk8 # mc0
-			device pci 18.0 on # northbridge
-				# Devices on link 0, link 0 == LDT 0
-				chip southbridge/nvidia/ck804
-					device pci 0.0 on end # HT
-					device pci 1.0 on # LPC
-						chip superio/ite/it8712f
-							device pnp 2e.0 off # Floppy
-								io 0x60 = 0x03f0
-								irq 0x70 = 6
-								drq 0x74 = 2
-							end
-							device pnp 2e.1 on # Com1
-								io 0x60 = 0x03f8
-								irq 0x70 = 4
-							end
-							device pnp 2e.2 off # Com2
-								io 0x60 = 0x02f8
-								irq 0x70 = 3
-							end
-							device pnp 2e.3 on # Parallel Port
-								io 0x60 = 0x0378
-								irq 0x70 = 7
-							end
-							device pnp 2e.4 on # Environment Controller
-								io 0x60 = 0x0290
-								io 0x62 = 0x0000
-								irq 0x70 = 0x00
-							end
-							device pnp 2e.5 on # Keyboard
-								io 0x60 = 0x0060
-								io 0x62 = 0x0064
-								irq 0x70 = 0x01
-								irq 0x71 = 0x02
-							end
-							device pnp 2e.6 on # Mouse
-								irq 0x70 = 0x0c
-								irq 0x71 = 0x02
-							end
-							device pnp 2e.7 on # GPIO config
-								# Set GPIO 1 & 2
-								io 0x25 = 0x0000
-								# Set GPIO 3 & 4
-								io 0x27 = 0x2540
-								# GPIO Polarity for Set 3
-								io 0xb2 = 0x2100
-								# GPIO Pin Internal Pull up for Set 3
-								io 0xba = 0x0100
-								# Simple I/O register config
-								io 0xc0 = 0x0000
-								io 0xc2 = 0x2540
-								io 0xc8 = 0x0000
-								io 0xca = 0x0500
-							end
-							device pnp 2e.8 off end # Midi port
-							device pnp 2e.9 off end # Game port
-							device pnp 2e.a off end # IR
-						end
-					end
-					device pci 1.1 on # SM 0
-						# chip drivers/generic/generic #dimm 0-0-0
-						# 	device i2c 50 on end
-						# end
-						# chip drivers/generic/generic #dimm 0-0-1
-						# 	device i2c 51 on end
-						# end
-						# chip drivers/generic/generic #dimm 0-1-0
-						# 	device i2c 52 on end
-						# end
-						# chip drivers/generic/generic #dimm 0-1-1
-						# 	device i2c 53 on end
-						# end
-						# chip drivers/generic/generic #dimm 1-0-0
-						# 	device i2c 54 on end
-						# end
-						# chip drivers/generic/generic #dimm 1-0-1
-						# 	device i2c 55 on end
-						# end
-						# chip drivers/generic/generic #dimm 1-1-0
-						# 	device i2c 56 on end
-						# end
-						# chip drivers/generic/generic #dimm 1-1-1
-						# 	device i2c 57 on end
-						# end
-					end # SM
-					device pci 2.0 on end # USB 1.1
-					device pci 2.1 on end # USB 2
-					device pci 4.0 off end # ACI
-					device pci 4.1 off end # MCI
-					device pci 6.0 on end # IDE
-					device pci 7.0 on end # SATA 1
-					device pci 8.0 on end # SATA 0
-					device pci 9.0 on end # PCI
-					device pci a.0 on end # NIC
-					device pci b.0 on end # PCI E 3
-					device pci c.0 on end # PCI E 2
-					device pci d.0 on end # PCI E 1
-					device pci e.0 on end # PCI E 0
-					register "ide0_enable" = "1"
-					register "ide1_enable" = "1"
-					register "sata0_enable" = "1"
-					register "sata1_enable" = "1"
-#					register "mac_eeprom_smbus" = "3"
-#					register "mac_eeprom_addr" = "0x51"
-				end
-
-			end # device pci 18.0
-			device pci 18.1 on end
-			device pci 18.2 on end
-			device pci 18.3 on end
-		end # mc0
-	end # pci_domain
+  device pci_domain 0 on
+    chip northbridge/amd/amdk8			# mc0
+      device pci 18.0 on			# Northbridge
+        # Devices on link 0, link 0 == LDT 0
+        chip southbridge/nvidia/ck804
+          device pci 0.0 on end			# HT
+          device pci 1.0 on			# LPC
+            chip superio/smsc/smscsuperio
+              device pnp 2e.0 on		# Floppy
+                io 0x60 = 0x03f0
+                irq 0x70 = 6
+                drq 0x74 = 2
+              end
+              device pnp 2e.3 on		# Parallel Port
+                io 0x60 = 0x0378
+                irq 0x70 = 7
+              end
+              device pnp 2e.4 on		# COM1
+                io 0x60 = 0x03f8
+                irq 0x70 = 4
+              end
+              device pnp 2e.5 off end		# No COM2 on this board!
+              device pnp 2e.7 on		# PS/2 Keyboard & Mouse
+                io 0x60 = 0x60
+                io 0x62 = 0x64
+                irq 0x70 = 1
+                irq 0x72 = 12
+              end
+              # TODO: Turning RT on causes FILO hangs for me...
+              device pnp 2e.a off end		# RT
+            end
+          end
+          device pci 1.1 on			# SM 0
+            # chip drivers/generic/generic	#dimm 0-0-0
+            #   device i2c 50 on end
+            # end
+            # chip drivers/generic/generic	#dimm 0-0-1
+            #   device i2c 51 on end
+            # end
+            # chip drivers/generic/generic	#dimm 0-1-0
+            #   device i2c 52 on end
+            # end
+            # chip drivers/generic/generic	#dimm 0-1-1
+            #   device i2c 53 on end
+            # end
+          end # SM
+          device pci 2.0 on end			# USB 1.1
+          device pci 2.1 on end			# USB 2
+          device pci 4.0 on end			# AC'97 Audio
+          device pci 4.1 on end			# AC'97 Modem
+          device pci 6.0 on end			# IDE
+          device pci 7.0 on end			# SATA 1
+          device pci 8.0 on end			# SATA 0
+          device pci 9.0 on end			# PCI
+          device pci a.0 on end			# NIC
+          device pci b.0 on end			# PCI E 3
+          device pci c.0 on end			# PCI E 2
+          device pci d.0 on end			# PCI E 1
+          device pci e.0 on end			# PCI E 0
+          register "ide0_enable" = "1"
+          register "ide1_enable" = "1"
+          register "sata0_enable" = "1"
+          register "sata1_enable" = "1"
+          # register "mac_eeprom_smbus" = "3"
+          # register "mac_eeprom_addr" = "0x51"
+        end
+      end # device pci 18.0
+      device pci 18.1 on end			# Host bridge: Address map
+      device pci 18.2 on end			# Host bridge: DRAM controller
+      device pci 18.3 on end			# Host bridge: Misc. control
+    end # mc0
+  end # pci_domain
 end # root_complex
Index: src/mainboard/asus/a8n_e/cache_as_ram_auto.c
===================================================================
--- src/mainboard/asus/a8n_e/cache_as_ram_auto.c	(Revision 2739)
+++ src/mainboard/asus/a8n_e/cache_as_ram_auto.c	(Arbeitskopie)
@@ -24,9 +24,6 @@
 #define ASSEMBLY 1
 #define __ROMCC__
 
-/* Used by it8712f_enable_serial(). */
-#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
-
 /* Used by raminit. */
 #define QRANK_DIMM_SUPPORT 1
 
@@ -47,13 +44,19 @@
 #include "pc80/mc146818rtc_early.c"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
-#include "superio/ite/it8712f/it8712f_early_serial.c"
+#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
 
+#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
+
 #if USE_FAILOVER_IMAGE == 0
 
-/* Used by ck894_early_setup(). */
+/* Used by ck804_early_setup(). */
 #define CK804_NUM 1
 
+#define CK804B_BUSN 0x80
+#define CK804_USE_NIC 1
+#define CK804_USE_ACI 1
+
 #if CONFIG_USE_INIT == 0
 #include "lib/memcpy.c"
 #endif
@@ -221,7 +224,7 @@
 		bsp_apicid = init_cpus(cpu_init_detectedx);
 	}
 
-	it8712f_enable_serial(SERIAL_DEV, TTYS0_BASE);
+	smscsuperio_enable_serial(SERIAL_DEV, TTYS0_BASE);
 	uart_init();
 	console_init();
 
Index: src/northbridge/amd/amdk8/raminit.c
===================================================================
--- src/northbridge/amd/amdk8/raminit.c	(Revision 2739)
+++ src/northbridge/amd/amdk8/raminit.c	(Arbeitskopie)
@@ -620,7 +620,8 @@
 #warning "FIXME: Implement a better test for Opterons"
 	uint32_t nbcap;
 	nbcap = pci_read_config32(ctrl->f3, NORTHBRIDGE_CAP);
-	return !!(nbcap & NBCAP_128Bit);
+	//// return !!(nbcap & NBCAP_128Bit);
+	return 0;
 }
 
 static int is_registered(const struct mem_controller *ctrl)

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