Hi, Yes, HT has default settings when power on. But another question is: if data is transferred through this route, there must be a serial-to-parallel module in either BCM 5780 or processor. Because the data bus of processor is wider than HT link. But I can' t find the module.
Best Regards 丰立波 Feng Libo @ AMD Ext: 20906 Mobile Phone: 13683249071 Office Phone: 0086-010-62801406 ________________________________ From: Darmawan Salihun [mailto:[EMAIL PROTECTED] Sent: Thursday, September 13, 2007 12:21 PM To: Feng, Libo; linuxbios Subject: Re: [LinuxBIOS] A question of LPC Hi, On 9/13/07, Feng, Libo <[EMAIL PROTECTED]> wrote: BIOS FLASH is attached on LPC. But the data in BIOS should eventually appear in the data bus of processor. How do the data in BIOS get to the data bus of processor? In the MSI ms9185, processor is connected with BCM 5780 via hyper transport, the BCM 5780 is then connected with BCM 5785 via hyper transport, and LPC is attached to BCM 5785. However, when the first instruction is fetched from BIOS, HT is not well initialized yet. How the data get to the data bus of processor? Best Regards 丰立波 Feng Libo @ AMD Ext: 20906 Mobile Phone: 13683249071 Office Phone: 0086-010-62801406 -- linuxbios mailing list [email protected] http://www.linuxbios.org/mailman/listinfo/linuxbios I think HT has default values for link width and speed, right? That way, data can still be sent to the processor. I'm not too sure about newer version of HT specs, because it was HT version 1.0 spec that I read back then. CMIIW Regards, Darmawan Salihun -------------------------------------------------------------------- -= Human knowledge belongs to the world =-
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