FYI:

/* i82801er has this commented out, wonder why? */
/* System error enable */
reg32 = pci_read_config32(dev, 0x04);
reg32 |= (1 << 8);      /* SERR# Enable */
reg32 |= (1 << 6);      /* Parity Error Response */
pci_write_config32(dev, 0x04, reg32);

I don't know about the i82801er, but as far as the i82801DB this is a  
16 bit register not 32. I think this was commented out because it  
already gets done in pci_device.c in the pci_bus_enable_resources()  
function. Is there any benifits from setting it twice??

Thanks - Joe

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