Since my hard drive literally screamed at me today, I figured it is time
to send my current raw flashrom diff to the list. Some parts of it are
already acked, some are just reminders something is wrong.
Carl-Daniel
Index: util/flashrom/flash.h
===================================================================
--- util/flashrom/flash.h (Revision 2802)
+++ util/flashrom/flash.h (Arbeitskopie)
@@ -68,8 +68,31 @@
#define AT_29C040A 0xA4
#define AT_29C020 0xDA
+#define EON_ID 0x1C
+/* EN25 chips are SPI, first byte of device id is memory type,
+ second byte of device id is log(bitsize)-9 */
+#define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
+#define EN_25B10 0x2011
+#define EN_25B20 0x2012
+#define EN_25B40 0x2013
+#define EN_25B80 0x2014
+#define EN_25B16 0x2015
+#define EN_25B32 0x2016
+
#define MX_ID 0xC2 /* Macronix (MX) */
#define MX_29F002 0xB0
+/* MX25L chips are SPI, first byte of device id is memory type,
+ second byte of device id is log(bitsize)-9 */
+#define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
+#define MX_25L1005 0x2011
+#define MX_25L2005 0x2012
+#define MX_25L4005 0x2013 /* MX25L4005{,A} */
+#define MX_25L8005 0x2014
+#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
+#define MX_25L3205 0x2016 /* MX25L3205{,A} */
+#define MX_25L6405 0x2017 /* MX25L3205{,D} */
+#define MX_25L1635D 0x2415
+#define MX_25L3235D 0x2416
#define SHARP_ID 0xB0 /* Sharp */
#define SHARP_LHF00L04 0xCF
Index: util/flashrom/en29f002a.c
===================================================================
--- util/flashrom/en29f002a.c (Revision 0)
+++ util/flashrom/en29f002a.c (Revision 0)
@@ -0,0 +1,65 @@
+/*
+ EN29F512 has 1C,21
+ EN29F010 has 1C,20
+ EN29F040A has 1C,04
+ EN29LV010 has 1C,6E and uses short F0 reset sequence
+ EN29LV040(A) has 1C,4F and uses short F0 reset sequence
+ */
+int probe_en29f512(struct flashchip *flash)
+{
+ volatile uint8_t *bios = flash->virtual_memory;
+ uint8_t id1, id2;
+
+ *(volatile uint8_t *)(bios + 0x555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x555) = 0x90;
+
+ myusec_delay(10);
+
+ id1 = *(volatile uint8_t *)(bios + 0x100);
+ id2 = *(volatile uint8_t *)(bios + 0x101);
+
+ /* exit by writing F0 anywhere? or the code below */
+ *(volatile uint8_t *)(bios + 0x555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x555) = 0xF0;
+
+ printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
+
+ if (id1 == flash->manufacture_id && id2 == flash->model_id)
+ return 1;
+
+ return 0;
+}
+
+/*
+ EN29F002AT has 1C,92
+ EN29F002AB has 1C,97
+ */
+int probe_en29f002a(struct flashchip *flash)
+{
+ volatile uint8_t *bios = flash->virtual_memory;
+ uint8_t id1, id2;
+
+ *(volatile uint8_t *)(bios + 0x555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x555) = 0x90;
+
+ myusec_delay(10);
+
+ id1 = *(volatile uint8_t *)(bios + 0x100);
+ id2 = *(volatile uint8_t *)(bios + 0x101);
+
+ /* exit by writing F0 anywhere? or the code below */
+ *(volatile uint8_t *)(bios + 0x555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x555) = 0xF0;
+
+ printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
+
+ if (id1 == flash->manufacture_id && id2 == flash->model_id)
+ return 1;
+
+ return 0;
+}
+
Index: util/flashrom/chipset_enable.c
===================================================================
--- util/flashrom/chipset_enable.c (Revision 2802)
+++ util/flashrom/chipset_enable.c (Arbeitskopie)
@@ -381,7 +381,7 @@
/* dump_pci_device(dev); */
- /* Set the 4MB enable bit bit */
+ /* Set the 0-4 MB enable bits */
byte = pci_read_byte(dev, 0x88);
byte |= 0xff; /* 256K */
pci_write_byte(dev, 0x88, byte);
@@ -389,7 +389,7 @@
byte |= 0xff; /* 1M */
pci_write_byte(dev, 0x8c, byte);
word = pci_read_word(dev, 0x90);
- word |= 0x7fff; /* 15M */
+ word |= 0x7fff; /* 16M */
pci_write_word(dev, 0x90, word);
old = pci_read_byte(dev, 0x6d);
Index: util/flashrom/board_enable.c
===================================================================
--- util/flashrom/board_enable.c (Revision 2802)
+++ util/flashrom/board_enable.c (Arbeitskopie)
@@ -4,6 +4,7 @@
* Copyright (C) 2005-2007 coresystems GmbH <[EMAIL PROTECTED]>
* Copyright (C) 2006 Uwe Hermann <[EMAIL PROTECTED]>
* Copyright (C) 2007 Luc Verhaegen <[EMAIL PROTECTED]>
+ * Copyright (C) 2007 Carl-Daniel Hailfinger
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -29,6 +30,104 @@
#include <string.h>
#include "flash.h"
+/* Generic Super I/O helper functions */
+uint8_t regval(uint16_t port, uint8_t reg)
+{
+ outb(reg, port);
+ return inb(port + 1);
+}
+
+void regwrite(uint16_t port, uint8_t reg, uint8_t val)
+{
+ outb(reg, port);
+ outb(val, port + 1);
+}
+
+/* Helper functions for most recent ITE IT87xx Super I/O chips */
+#define CHIP_ID_BYTE1_REG 0x20
+#define CHIP_ID_BYTE2_REG 0x21
+static void enter_conf_mode_ite(uint16_t port)
+{
+ outb(0x87, port);
+ outb(0x01, port);
+ outb(0x55, port);
+ if (port == 0x2e)
+ outb(0x55, port);
+ else
+ outb(0xaa, port);
+}
+
+static void exit_conf_mode_ite(uint16_t port)
+{
+ regwrite(port, 0x02, 0x02);
+}
+
+static uint16_t find_ite_serial_flash_port(uint16_t port)
+{
+ uint8_t tmp = 0;
+ uint16_t id, flashport = 0;
+
+ enter_conf_mode_ite(port);
+
+ id = regval(port, CHIP_ID_BYTE1_REG) << 8;
+ id |= regval(port, CHIP_ID_BYTE2_REG);
+
+ /* TODO: Handle more IT87xx if they support flash translation */
+ if (id == 0x8716) {
+ /* NOLDN, reg 0x24, mask out lowest bit (suspend) */
+ tmp = regval(port, 0x24) & 0xFE;
+ printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
+ 0xFFFE0000, 0xFFFFFFFF, (tmp & 1 << 1) ? "en" : "dis");
+ printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
+ 0x000E0000, 0x000FFFFF, (tmp & 1 << 1) ? "en" : "dis");
+ printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
+ 0xFFEE0000, 0xFFEFFFFF, (tmp & 1 << 2) ? "en" : "dis");
+ printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
+ 0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis");
+ printf("LPC write to serial flash %sabled\n",
+ (tmp & 1 << 4) ? "en" : "dis");
+ printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29);
+ /* LDN 0x7, reg 0x64/0x65 */
+ regwrite(port, 0x07, 0x7);
+ flashport = regval(port, 0x64) << 8;
+ flashport |= regval(port, 0x65);
+ }
+ exit_conf_mode_ite(port);
+ return flashport;
+}
+
+static void it8716_serial_rdid(uint16_t port)
+{
+ uint8_t busy, data0, data1, data2;
+ do {
+ busy = inb(port) & 0x80;
+ } while (busy);
+ /* RDID */
+ outb(0x9f, port + 1);
+ /* Start IO, 33MHz, 3 input bytes, 0 output bytes*/
+ outb((0x5<<4)|(0x3<<2)|(0x0), port);
+ do {
+ busy = inb(port) & 0x80;
+ } while (busy);
+ data0 = inb(port + 5);
+ data1 = inb(port + 6);
+ data2 = inb(port + 7);
+ printf("RDID returned %02x %02x %02x\n", data0, data1, data2);
+ return;
+}
+
+static int it87xx_probe_serial_flash(const char *name)
+{
+ uint16_t flashport;
+ flashport = find_ite_serial_flash_port(0x2e);
+ if (flashport)
+ it8716_serial_rdid(flashport);
+ flashport = find_ite_serial_flash_port(0x4e);
+ if (flashport)
+ it8716_serial_rdid(flashport);
+ return 0;
+}
+
/*
* Helper functions for many Winbond Super I/Os of the W836xx range.
*/
@@ -314,6 +413,8 @@
};
struct board_pciid_enable board_pciid_enables[] = {
+ {0x10de, 0x0360, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ "gigabyte", "ga-m57sli", "GIGABYTE GA-M57SLI",
it87xx_probe_serial_flash},
{0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
"iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise},
{0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000,
--
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