Hello again everyone,
Another patch we hacked up today to get flashrom working on the MSI
K8N-Neo3 board. Let us know what you think!
Signed-off-by: David Hendricks <[EMAIL PROTECTED]>
Index: board_enable.c
===================================================================
--- board_enable.c (revision 2763)
+++ board_enable.c (working copy)
@@ -32,43 +32,43 @@
/*
* Helper functions for many Winbond Super I/Os of the W836xx range.
*/
-#define W836_INDEX 0x2E
-#define W836_DATA 0x2F
+#define W836_INDEX_2E 0x2E
+#define W836_INDEX_4E 0x4E
/* Enter extended functions */
-static void w836xx_ext_enter(void)
+static void w836xx_ext_enter(unsigned char index)
{
- outb(0x87, W836_INDEX);
- outb(0x87, W836_INDEX);
+ outb(0x87, index);
+ outb(0x87, index);
}
/* Leave extended functions */
-static void w836xx_ext_leave(void)
+static void w836xx_ext_leave(unsigned char index)
{
- outb(0xAA, W836_INDEX);
+ outb(0xAA, index);
}
/* General functions for reading/writing Winbond Super I/Os. */
-static unsigned char wbsio_read(unsigned char index)
+static unsigned char wbsio_read(unsigned char index, unsigned char reg)
{
- outb(index, W836_INDEX);
- return inb(W836_DATA);
+ outb(reg, index);
+ return inb(index+1);
}
-static void wbsio_write(unsigned char index, unsigned char data)
+static void wbsio_write(unsigned char index, unsigned char reg, unsigned char
data)
{
- outb(index, W836_INDEX);
- outb(data, W836_DATA);
+ outb(reg, index);
+ outb(data, index+1);
}
-static void wbsio_mask(unsigned char index, unsigned char data,
+static void wbsio_mask(unsigned char index, unsigned char reg, unsigned char
data,
unsigned char mask)
{
unsigned char tmp;
- outb(index, W836_INDEX);
- tmp = inb(W836_DATA) & ~mask;
- outb(tmp | (data & mask), W836_DATA);
+ outb(reg, index);
+ tmp = inb(index+1) & ~mask;
+ outb(tmp | (data & mask), index+1);
}
/**
@@ -80,35 +80,69 @@
*/
static int w83627hf_gpio24_raise(const char *name)
{
- w836xx_ext_enter();
+ w836xx_ext_enter(W836_INDEX_2E);
/* Is this the w83627hf? */
- if (wbsio_read(0x20) != 0x52) { /* SIO device ID register */
+ if (wbsio_read(W836_INDEX_2E, 0x20) != 0x52) { /* SIO device ID
register */
fprintf(stderr, "\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n",
- name, wbsio_read(0x20));
- w836xx_ext_leave();
+ name, wbsio_read(W836_INDEX_2E, 0x20));
+ w836xx_ext_leave(W836_INDEX_2E);
return -1;
}
/* PIN89S: WDTO/GP24 multiplex -> GPIO24 */
- wbsio_mask(0x2B, 0x10, 0x10);
+ wbsio_mask(W836_INDEX_2E, 0x2B, 0x10, 0x10);
- wbsio_write(0x07, 0x08); /* Select logical device 8: GPIO port 2
*/
+ wbsio_write(W836_INDEX_2E, 0x07, 0x08); /* Select logical device 8:
GPIO port 2 */
- wbsio_mask(0x30, 0x01, 0x01); /* Activate logical device. */
+ wbsio_mask(W836_INDEX_2E, 0x30, 0x01, 0x01); /* Activate logical
device. */
- wbsio_mask(0xF0, 0x00, 0x10); /* GPIO24 -> output */
+ wbsio_mask(W836_INDEX_2E, 0xF0, 0x00, 0x10); /* GPIO24 -> output */
- wbsio_mask(0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */
+ wbsio_mask(W836_INDEX_2E, 0xF2, 0x00, 0x10); /* Clear GPIO24
inversion */
- wbsio_mask(0xF1, 0x10, 0x10); /* Raise GPIO24 */
+ wbsio_mask(W836_INDEX_2E, 0xF1, 0x10, 0x10); /* Raise GPIO24 */
- w836xx_ext_leave();
+ w836xx_ext_leave(W836_INDEX_2E);
return 0;
}
/**
+ * Winbond W83627THF: GPIO 4, bit 4
+ *
+ * Suited for:
+ * - MSI K8N-NEO3
+ */
+static int w83627thf_gpio4_4_raise(const char *name)
+{
+ w836xx_ext_enter(W836_INDEX_4E);
+ /* Is this the w83627thf? */
+ if (wbsio_read(W836_INDEX_4E, 0x20) != 0x82) { /* SIO device ID
register */
+ fprintf(stderr, "\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n",
+ name, wbsio_read(W836_INDEX_4E, 0x20));
+ w836xx_ext_leave(W836_INDEX_4E);
+ return -1;
+ }
+
+ /* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */
+
+ wbsio_write(W836_INDEX_4E, 0x07, 0x09); /* Select logical device 9:
GPIO port 4 */
+
+ wbsio_mask(W836_INDEX_4E, 0x30, 0x02, 0x02); /* Activate logical
device. */
+
+ wbsio_mask(W836_INDEX_4E, 0xF4, 0x00, 0x10); /* GPIO4 bit 4 ->
output */
+
+ wbsio_mask(W836_INDEX_4E, 0xF6, 0x00, 0x10); /* Clear GPIO4 bit 4
inversion */
+
+ wbsio_mask(W836_INDEX_4E, 0xF5, 0x10, 0x10); /* Raise GPIO4 bit 4 */
+
+ w836xx_ext_leave(W836_INDEX_4E);
+
+ return 0;
+}
+
+/**
* Suited for VIAs EPIA M and MII, and maybe other CLE266 based EPIAs.
*
* We don't need to do this when using LinuxBIOS, GPIO15 is never lowered
there.
@@ -165,12 +199,12 @@
pci_write_byte(dev, 0x59, val);
/* Raise ROM MEMW# line on Winbond w83697 SuperIO */
- w836xx_ext_enter();
+ w836xx_ext_enter(W836_INDEX_2E);
- if (!(wbsio_read(0x24) & 0x02)) /* flash rom enabled? */
- wbsio_mask(0x24, 0x08, 0x08); /* enable MEMW# */
+ if (!(wbsio_read(W836_INDEX_2E, 0x24) & 0x02)) /* flash rom enabled? */
+ wbsio_mask(W836_INDEX_2E, 0x24, 0x08, 0x08); /* enable MEMW#
*/
- w836xx_ext_leave();
+ w836xx_ext_leave(W836_INDEX_2E);
return 0;
}
@@ -316,6 +350,8 @@
struct board_pciid_enable board_pciid_enables[] = {
{0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
"iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise},
+ {0x10de, 0x005e, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ "MSI", "K8N-NEO3", "MSI K8N-NEO3", w83627thf_gpio4_4_raise},
{0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000,
"AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise},
{0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01,
@@ -357,6 +393,7 @@
continue;
return board;
}
+ printf("NOT FOUND %s:%s\n", vendor, part);
return NULL;
}
--
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