See patch.
Uwe.
--
http://www.hermann-uwe.de | http://www.holsham-traders.de
http://www.crazy-hacks.org | http://www.unmaintained-free-software.org
Constify structs which can be const.
Signed-off-by: Uwe Hermann <[EMAIL PROTECTED]>
Index: include/device/device.h
===================================================================
--- include/device/device.h (Revision 518)
+++ include/device/device.h (Arbeitskopie)
@@ -270,7 +270,7 @@
resource_t align_up(resource_t val, unsigned long gran);
resource_t align_down(resource_t val, unsigned long gran);
-extern struct device_operations default_dev_ops_root;
+extern const struct device_operations default_dev_ops_root;
extern int id_eq(struct device_id *id1, struct device_id *id2);
void root_dev_read_resources(struct device * dev);
Index: include/arch/x86/pci_ops.h
===================================================================
--- include/arch/x86/pci_ops.h (Revision 518)
+++ include/arch/x86/pci_ops.h (Arbeitskopie)
@@ -17,11 +17,11 @@
#ifndef ARCH_X86_PCI_OPS_H
#define ARCH_X86_PCI_OPS_H
-extern struct pci_bus_operations pci_cf8_conf1;
-extern struct pci_bus_operations pci_cf8_conf2;
+extern const struct pci_bus_operations pci_cf8_conf1;
+extern const struct pci_bus_operations pci_cf8_conf2;
#if defined(CONFIG_MMCONF_SUPPORT) && (CONFIG_MMCONF_SUPPORT==1)
-extern struct pci_bus_operations pci_ops_mmconf;
+extern const struct pci_bus_operations pci_ops_mmconf;
#endif
void pci_set_method(struct device * dev);
Index: mainboard/artecgroup/dbe61/initram.c
===================================================================
--- mainboard/artecgroup/dbe61/initram.c (Revision 518)
+++ mainboard/artecgroup/dbe61/initram.c (Arbeitskopie)
@@ -107,7 +107,7 @@
/* Hold Count - how long we will sit in reset */
#define PLLMSRlo 0x00DE0000
-struct wmsr {
+static const struct wmsr {
u32 reg;
struct msr msr;
} dbe61_msr[] = {
Index: mainboard/artecgroup/dbe61/stage1.c
===================================================================
--- mainboard/artecgroup/dbe61/stage1.c (Revision 518)
+++ mainboard/artecgroup/dbe61/stage1.c (Arbeitskopie)
@@ -30,7 +30,7 @@
#include <southbridge/amd/cs5536/cs5536.h>
#include <northbridge/amd/geodelx/raminit.h>
-struct wmsr {
+static const struct wmsr {
u32 reg;
struct msr msr;
} dbe61_msr[] = {
Index: mainboard/emulation/qemu-x86/vga.c
===================================================================
--- mainboard/emulation/qemu-x86/vga.c (Revision 518)
+++ mainboard/emulation/qemu-x86/vga.c (Arbeitskopie)
@@ -40,7 +40,7 @@
init_pc_keyboard(0x60, 0x64, &conf);
}
-static struct device_operations qemuvga_pci_ops_dev = {
+static const struct device_operations qemuvga_pci_ops_dev = {
.constructor = default_device_constructor,
.phase3_scan = 0,
.phase4_read_resources = pci_dev_read_resources,
@@ -51,7 +51,7 @@
.ops_pci = &pci_dev_ops_pci,
};
-struct constructor qemuvga_constructors[] = {
+const struct constructor qemuvga_constructors[] = {
{.id = {.type = DEVICE_ID_PCI,
.u = {.pci = {.vendor = PCI_VENDOR_ID_CIRRUS,
.device = PCI_DEVICE_ID_CIRRUS_5446}}},
Index: device/pcie_device.c
===================================================================
--- device/pcie_device.c (Revision 518)
+++ device/pcie_device.c (Arbeitskopie)
@@ -57,11 +57,11 @@
}
/** Default device operations for PCI Express bridges. */
-static struct pci_operations pcie_bus_ops_pci = {
+static const struct pci_operations pcie_bus_ops_pci = {
.set_subsystem = 0,
};
-struct device_operations default_pcie_ops_bus = {
+const struct device_operations default_pcie_ops_bus = {
.read_resources = pci_bus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_bus_enable_resources,
Index: device/cardbus_device.c
===================================================================
--- device/cardbus_device.c (Revision 518)
+++ device/cardbus_device.c (Arbeitskopie)
@@ -242,7 +242,7 @@
return max;
}
-struct device_operations default_cardbus_ops_bus = {
+const struct device_operations default_cardbus_ops_bus = {
.read_resources = cardbus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = cardbus_enable_resources,
Index: device/root_device.c
===================================================================
--- device/root_device.c (Revision 518)
+++ device/root_device.c (Arbeitskopie)
@@ -216,7 +216,7 @@
* own ops in (e.g.) the mainboard, and initialize it in the dts in the
* mainboard directory.
*/
-struct device_operations default_dev_ops_root = {
+const struct device_operations default_dev_ops_root = {
.phase4_read_resources = root_dev_read_resources,
.phase4_set_resources = root_dev_set_resources,
.phase5_enable_resources = root_dev_enable_resources,
Index: device/hypertransport.c
===================================================================
--- device/hypertransport.c (Revision 518)
+++ device/hypertransport.c (Arbeitskopie)
@@ -629,11 +629,11 @@
}
/** Default device operations for hypertransport bridges. */
-static struct pci_operations ht_bus_ops_pci = {
+static const struct pci_operations ht_bus_ops_pci = {
.set_subsystem = 0,
};
-struct device_operations default_ht_ops_bus = {
+const struct device_operations default_ht_ops_bus = {
.read_resources = pci_bus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_bus_enable_resources,
Index: device/pcix_device.c
===================================================================
--- device/pcix_device.c (Revision 518)
+++ device/pcix_device.c (Arbeitskopie)
@@ -136,11 +136,11 @@
}
/** Default device operations for PCI-X bridges. */
-static struct pci_operations pcix_bus_ops_pci = {
+static const struct pci_operations pcix_bus_ops_pci = {
.set_subsystem = 0,
};
-struct device_operations default_pcix_ops_bus = {
+const struct device_operations default_pcix_ops_bus = {
.read_resources = pci_bus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_bus_enable_resources,
Index: device/agp_device.c
===================================================================
--- device/agp_device.c (Revision 518)
+++ device/agp_device.c (Arbeitskopie)
@@ -55,11 +55,11 @@
}
/** Default device operations for AGP bridges. */
-static struct pci_operations agp_bus_ops_pci = {
+static const struct pci_operations agp_bus_ops_pci = {
.set_subsystem = 0,
};
-struct device_operations default_agp_ops_bus = {
+const struct device_operations default_agp_ops_bus = {
.read_resources = pci_bus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_bus_enable_resources,
Index: arch/x86/geodelx/cpu.c
===================================================================
--- arch/x86/geodelx/cpu.c (Revision 518)
+++ arch/x86/geodelx/cpu.c (Arbeitskopie)
@@ -83,7 +83,7 @@
* in multiple CPU files and use the device ID, at scan time, to pick which
* one is used. There is a lot of flexibility here!
*/
-static struct device_operations geodelx_cpuops = {
+static const struct device_operations geodelx_cpuops = {
.constructor = default_device_constructor,
.phase3_scan = NULL,
.phase6_init = lx_init,
@@ -97,7 +97,7 @@
* depending on date manufactured they can be all over the place (the Geode
* alone has had 3 vendors!) so we will have to be careful.
*/
-struct constructor geodelx_constructors[] = {
+const struct constructor geodelx_constructors[] = {
{.id = {.type = DEVICE_ID_PCI,
/* TODO: This is incorrect, these are _not_ PCI IDs! */
.u = {.pci = {.vendor = X86_VENDOR_AMD,.device = 0x05A2}}},
Index: arch/x86/pci_ops_conf1.c
===================================================================
--- arch/x86/pci_ops_conf1.c (Revision 518)
+++ arch/x86/pci_ops_conf1.c (Arbeitskopie)
@@ -58,8 +58,7 @@
#undef CONFIG_CMD
-struct pci_bus_operations pci_cf8_conf1 =
-{
+const struct pci_bus_operations pci_cf8_conf1 = {
.read8 = pci_conf1_read_config8,
.read16 = pci_conf1_read_config16,
.read32 = pci_conf1_read_config32,
Index: arch/x86/pci_ops_conf2.c
===================================================================
--- arch/x86/pci_ops_conf2.c (Revision 518)
+++ arch/x86/pci_ops_conf2.c (Arbeitskopie)
@@ -67,8 +67,7 @@
#undef IOADDR
#undef DEVFUNC
-struct pci_bus_operations pci_cf8_conf2 =
-{
+const struct pci_bus_operations pci_cf8_conf2 = {
.read8 = pci_conf2_read_config8,
.read16 = pci_conf2_read_config16,
.read32 = pci_conf2_read_config32,
Index: arch/x86/pci_ops_mmconf.c
===================================================================
--- arch/x86/pci_ops_mmconf.c (Revision 518)
+++ arch/x86/pci_ops_mmconf.c (Arbeitskopie)
@@ -48,9 +48,7 @@
write8x(PCI_MMIO_ADDR(bus, devfn, where), value);
}
-
-const struct pci_bus_operations pci_ops_mmconf =
-{
+const struct pci_bus_operations pci_ops_mmconf = {
.read8 = pci_mmconf_read_config8,
.read16 = pci_mmconf_read_config16,
.read32 = pci_mmconf_read_config32,
--
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