On Mon, Nov 26, 2007 at 05:24:25PM -0600, [EMAIL PROTECTED] wrote:
> Add board-enable for Acorp 6A815EPD.
>
> Signed-off-by: Jonathan A. Kollasch <[EMAIL PROTECTED]>
Thanks, committed in r2995.
> + dev = pci_dev_find(0x8086, 0x2440); /* Intel ICH2 LPC */
> + if (!dev) {
> + fprintf(stderr, "\nERROR: ICH2 LPC bridge not found.\n");
> + return -1;
> + }
> +
> + /* use GPIOBASE register to find where the GPIO is mapped */
> + port = (pci_read_word(dev, 0x58) & 0xFF80) + 0xE;
Maybe I have a thinko, but shouldn't this be 0xffc0 instead of 0xff80?
> +
> + val = inb(port);
> + val |= 0x80; /* Top Block Lock -- pin 8 of PLCC32 */
> + val |= 0x40; /* Lower Blocks Lock -- pin 7 of PLCC32 */
This is board-specific I assume? Did you trace the connections going to
the ROM to find the specific lines?
Uwe.
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