Quoting [EMAIL PROTECTED]: > Hello, > > Yesterday I wrote some code for the Syslinux boot loader that is meant > to boot different images based on which revision of the CPU microcode > that is currently loaded in the CPU (yes, this is a bit strange but we > have a very good reason for it). I then compared my implementation with > a few others an ran across yours, in > http://www.openbios.org/viewvc/trunk/LinuxBIOSv2/src/cpu/intel/microcode > /microcode.c?view=markup > > Question to you guys: why is the first wrmsr instruction there? From my > understanding, by not properly initialising ECX, EAX and EDX this will > overwrite whatever is in the MSR pointed to by ECX?! > > BTW I tried out your code on our target hardware (Intel Celeron M, 600 > MHz) and with that first wrmsr line in place it hangs and without it, it > runs just fine. > > Just wanted to let you know. > > Best regards, > Martin Karlsson > Hmm, very good question. I think the microcode has been waiting for sommeone to update it. Anyone else have a take on this?
Thanks - Joe -- linuxbios mailing list linuxbios@linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios
