Hi Ed, On 27.12.2007 08:18, Ed Swierk wrote: > The attached patch includes preliminary support for the Intel 3100 > integrated northbridge/southbridge/superio > (http://www.intel.com/design/chipsets/embedded/3100.htm). So far the > code has been tested only on the Mt. Arvon development board > (http://www.intel.com/design/intarch/devkits/pm3100.htm), which > includes a 1.8GHz Pentium M and DDR2-400 ECC DRAM. >
Great! > The code works well enough to boot Linux 2.6.23.1 with serial console > (on the 3100's UART), IOAPIC, working USB, and working DRAM (memtest86 > passes). The kernel reports the CPU is running at 600MHz; haven't > figured out how to crank it up to full speed. A number of features are > incomplete or untested, including PCI Express and IDE/SATA. > This is a good start. > The southbridge code was adapted from 6300esb, the northbridge from > e7520, and I forget where the mainboard code came from. Kudos to > whoever implemented those. > > I'm working with a fairly old version of LinuxBIOSv2 so the patch > probably breaks the latest svn. > Could you try to merge up to current svn and retest? If it still works, merging will be easier. Then again, all files except src/include/device/pci_ids.h are newly created and shouldn't conflict. It seems that your code still depends on ROMCC. Do you see any chance to switch to CAR for initialization? I have some CAR fixes pending for Intel chips which should fix some problems of that code. One final question: Did you use the public data sheets or are you under NDA with intel? Regards, Carl-Daniel -- linuxbios mailing list linuxbios@linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios
