peace and calm after the storm, for some silly reason I thought access timings on the flash or DoC chips might be a problem, after a read of the SiS950 data sheet, I found: from tables 12.11 and 12.12, Flash rom I/F read: access 812 nSec write: access 868 nSec you could rob a bank in these times DoC has: read: 85 nSec (boot block) write: 46 nSec Flash is 90 nSec although there is a 165 mSec delay from power up, to first read of boot block on DoC, has anyone monitored this with a logic analyser to verify the matsonic board?? I think the problem is human related (ME) Regards Brian
