Ronald G Minnich <[EMAIL PROTECTED]> writes:
> If you have a suggested layout for the cpu tree I'd like to see it, since
> I ran out of good ideas :-)
As I merge in the alpha stuff certainly.
Right now linuxBIOS has some critical details in x86 assembly
because we need to debug through RAM initialization. I need
to see if the L1 cache hack works. If so quite a bit more
can be done in C, making it much more portable.
If it doesn't then a whole chunk of the tree needs to be made
architecture aware. I really think the L1 cache hack will
work but it needs to be verified.
Eric
