Ronald G Minnich wrote:
>
> On Mon, 12 Feb 2001, Richard A. Smith wrote:
>
> > I now understand all this jabber about SDRAM being a bitch. Quite
> > difficult to deal with when you don't have a stack.
>
> it's really bad. I wish we could just make it go away ...
>
> ron
I think the nasty cache trick is interesting.
Some thoughts:
All the assembly based serial code could go away. yeah! :-)
We would end up with processor dependent code before RAM is running.
(isn't enabling cache sometimes processor dependent? ...mtrr's etc.)
How much L1 cache can we expect if we can't get L2 running at this
level?
We could "place the cache" just below the extended BIOS access.
We would need to prevent any cache write-backs if we are to support
machines with 4G RAM.
(I think that a cache write-back would be deadly anyway. Use invd, not
wbinvd.)
RAMTEST could be written in C. This would open the door for a real RAM
test.
Ty
--
Tyson D Sawyer iRobot Corporation
Senior Systems Engineer Real World Interface Div.
[EMAIL PROTECTED] Robots for the Real World
603-532-6900 ext 206 http://www.irobot.com
