On Mon, May 07, 2001 at 09:53:02AM -0600, Ronald G Minnich wrote:
> are there recommended algorithms for setting the timers? just pick some
> nice number? I've never been sure what to do with those timers.
They're not terribly well documented, but here's my best impression.
This is really for the archives, since I've never seen all this
information in one place. I should really put up a webpage about this :)
Bad: Don't set them at all (in all cases I've looked at this results in a
setting of zero).
Better: just pick a number (I use 48 in my code) and set all devices and
bridges to that.
Best, in theory, though I doubt anybody does it:
For each card, read the MIN_GNT and MAX_LAT values, and calculate the
following:
latency_multiplier = (8 for 33MHz, 16 for 66MHz)
min_grant_clocks= latency_multiplier * min_gnt
max_latency_clocks= latency_multiplier * max_lat
Then, calculate the desired latency timer values for each device such
that:
1. each card's latency timer should be greater than that card's
min_grant_clocks.
2. each card's latency timer should be set as high as possible. This is
because the latency timer will truncate pci busmaster cycles when it
expires, so a too-low setting will hurt performance.
3. all latency timers should be set low enough that if boards A, B, and
C all start doing maximum length transfers, board D will still get
the bus before max_latency_clocks has elapsed. Or,
A.LT + B.LT + C.LT < D.max_latency_clocks
(should be satisfied for all permutations).
Whew.
Needless to say, factory BIOSes are all over the board on this, and I
suspect that most simply choose the "better" option (fixed values).
In truth, rule number 1 seems to get violated all the time without any ill
effects. Since everybody else ignores rule #1 and I doubt anybody even
tries to satisfy rule #3, the "better" option seems like the appropriate
compromise.
Eric
