"Hamish Guthrie \(Mail Lists\)" <[EMAIL PROTECTED]> writes:
> Eric and Developers,
>
> I am very pleased to hear about this joint effort - I think it is great.
>
> I have been looking at doing an implementation but I have a problem - the
> CPU core of my target device is a 486, and I do not have the TSC, and other
> than a nasty loop hack, I guess the only way of catering for timeouts is
> using the PIT.
Sound right. If that is the only timer you have.
> I have looked at the Etherboot code and the tick implementation is done by
> flipping back into real mode to allow the PIC to service PIT interrupts
> utilsing BIOS routines, and then flipping back to PMODE.Obviously in
> LinuxBIOS we get into PMODE as soon as possible and it makes a lot of sense
> for us to stay there. The issue now is to set up a good IDT and create a
> PMODE interrupt routine for the timer.
>
> I have broken 3 walls with my head bashing in trying to do this!
>
> Any suggestions?
Check out memtest86. I don't know if it does an especially good job
but does setup an interrupt descriptor table, and the code is pretty
straight forward.
The code to program the PIT from i8259.c is:
/*
* Set the clock to HZ Hz, we already have a valid
* vector now:
*/
outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */
outb_p(LATCH & 0xff , 0x40); /* LSB */
outb(LATCH >> 8 , 0x40); /* MSB */
Though I think this is short an enable.
Eric
