I faced strange problem while implementing SPD on 815ep.
The problem is only DIMM0 works.
If i plug my sdram (256MB, SS) into DIMM1 sdram doen't works.
Ofcause I programmed DRP (simillar register with DRB in 440BX) and
buffer strength using SPD. I even compared register values with the
case of normal bios + sdram in DIMM1.And I can't find anything wrong
regarding DRP and BUFF_SC values.
You may suspect that accessing address to send a command ( NOP,
PRECHARGE, ... ) to sdram is wrong. However, I plugged only one
sdram at a time and it is single side. Therefore, *as far as i know*,
access (read) address should be 0x0 in any case. That means no need
to change in enable_sdram procedure.
Can you give me any clues?
-
HeeChul Yun,
Researcher, Embedded S/W Team at ETRI
e-mail: [EMAIL PROTECTED]
phone: +82-42-860-1673
