Eric,
I moved the pgtbl to the last 1M of CONFIG_LB_MEM_TOPK....
Please check it.
YH
---------- Forwarded message ----------
From: Yinghai Lu <[EMAIL PROTECTED]>
Date: Dec 7, 2005 12:43 AM
Subject: [issue50] put pgtbl after 1M
To: [EMAIL PROTECTED], rminnich@lanl.gov, [EMAIL PROTECTED], [EMAIL PROTECTED]
New submission from Yinghai Lu <[EMAIL PROTECTED]>:
This one is needed for 8 way dual core with VGA support enabled.
The reason is every cpu page table will be 20k, and if there is 16 cpu will need
320k, it will push the stack and heap cross the 0xa0000, the region for vga font
buffer. TO use that need to set CONFIG_LB_MEM_TOPK in MB Options.lb
It also remove the hardcode 1M in clear_1m_ram.c to use CONFIG_LB_MEM_TOPK.
YH
----------
files: 1207_put_pgtbl_after_1m.diff
messages: 299
nosy: ollie, rminnich, stepan, yhlu
priority: urgent
status: chatting
title: put pgtbl after 1M
________________________________________________
LinuxBIOS issue tracker <[EMAIL PROTECTED]>
<https://openbios.org/roundup/linuxbios/issue50>
________________________________________________
Index: src/cpu/amd/car/clear_1m_ram.c
===================================================================
--- src/cpu/amd/car/clear_1m_ram.c (revision 2137)
+++ src/cpu/amd/car/clear_1m_ram.c (working copy)
@@ -3,54 +3,58 @@
static inline __attribute__((always_inline)) void clear_1m_ram(void)
{
__asm__ volatile (
+ /* disable cache */
+ "movl %cr0, %eax\n\t"
+ "orl $(0x1<<30),%eax\n\t"
+ "movl %eax, %cr0\n\t"
+ );
- /* disable cache */
- "movl %cr0, %eax\n\t"
- "orl $(0x1<<30),%eax\n\t"
- "movl %eax, %cr0\n\t"
+ /* enable caching for first 1M using variable mtrr */
+ __asm__ volatile (
+ "wrmsr"
+ : /* No outputs */
+ : "c" (0x200), "a" (0 | MTRR_TYPE_WRCOMB), "d" (0)
+ );
- /* enable caching for first 1M using variable mtrr */
- "movl $0x200, %ecx\n\t"
- "xorl %edx, %edx\n\t"
- "movl $(0 | 1), %eax\n\t"
-// "movl $(0 | MTRR_TYPE_WRCOMB), %eax\n\t"
- "wrmsr\n\t"
+ __asm__ volatile (
+ "wrmsr"
+ : /* No outputs */
+ : "c" (0x201), "a" ((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), "d" (0x0000000f)
+ );
- "movl $0x201, %ecx\n\t"
- "movl $0x0000000f, %edx\n\t"
- "movl $((~(( 0 + 0x100000) - 1)) | 0x800), %eax\n\t"
- "wrmsr\n\t"
+ __asm__ volatile(
+ /* clear the first 1M */
+ "cld\n\t"
+ "rep stosl\n\t"
+ :
+ : "a"(0), "D"(0) ,"c" ((CONFIG_LB_MEM_TOPK<<10)>>2)
+ );
- /* clear the first 1M */
- "movl $0x0, %edi\n\t"
- "cld\n\t"
- "movl $(0x100000>>2), %ecx\n\t"
- "xorl %eax, %eax\n\t"
- "rep stosl\n\t"
+ __asm__ volatile (
+ /* disable cache */
+ "movl %cr0, %eax\n\t"
+ "orl $(0x1<<30),%eax\n\t"
+ "movl %eax, %cr0\n\t"
+ );
- /* disable cache */
- "movl %cr0, %eax\n\t"
- "orl $(0x1<<30),%eax\n\t"
- "movl %eax, %cr0\n\t"
-
/* enable caching for first 1M using variable mtrr */
- "movl $0x200, %ecx\n\t"
- "xorl %edx, %edx\n\t"
- "movl $(0 | 6), %eax\n\t"
-// "movl $(0 | MTRR_TYPE_WRBACK), %eax\n\t"
- "wrmsr\n\t"
+ __asm__ volatile (
+ "wrmsr"
+ : /* No outputs */
+ : "c" (0x200), "a" (0 | MTRR_TYPE_WRBACK), "d" (0)
+ );
- "movl $0x201, %ecx\n\t"
- "movl $0x0000000f, %edx\n\t"
- "movl $((~(( 0 + 0x100000) - 1)) | 0x800), %eax\n\t"
- "wrmsr\n\t"
+ __asm__ volatile (
+ "wrmsr"
+ : /* No outputs */
+ : "c" (0x201), "a" ((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), "d" (0x0000000f)
+ );
-
- /* enable cache */
- "movl %cr0, %eax\n\t"
- "andl $0x9fffffff,%eax\n\t"
- "movl %eax, %cr0\n\t"
- "invd\n\t"
-
+ __asm__ volatile (
+ /* enable cache */
+ "movl %cr0, %eax\n\t"
+ "andl $0x9fffffff,%eax\n\t"
+ "movl %eax, %cr0\n\t"
+ "invd\n\t"
);
}
Index: src/cpu/x86/pae/pgtbl.c
===================================================================
--- src/cpu/x86/pae/pgtbl.c (revision 2137)
+++ src/cpu/x86/pae/pgtbl.c (working copy)
@@ -49,7 +49,16 @@
struct pde pd[2048];
struct pde pdp[512];
} __attribute__ ((packed));
+
+#if (CONFIG_LB_MEM_TOPK >= 2048)
+ /*
+ pgtbl is too big, so use last one 1M before CONFIG_LB_MEM_TOP, otherwise for 8 way dual core with vga support will push stack and heap cross 0xa0000,
+ and that region need to be used as vga font buffer. Please make sure set CONFIG_LB_MEM_TOPK=2048 in MB Config
+ */
+ struct pg_table *pgtbl = ((CONFIG_LB_MEM_TOPK-1024)<<10);
+#else
static struct pg_table pgtbl[CONFIG_MAX_CPUS] __attribute__ ((aligned(4096)));
+#endif
static unsigned long mapped_window[CONFIG_MAX_CPUS];
unsigned long index;
unsigned long window;
--
LinuxBIOS mailing list
LinuxBIOS@openbios.org
http://www.openbios.org/mailman/listinfo/linuxbios
