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Choosing the right low power processor for your embedded design (Sep. 24, 2008)
Key selection criteria show where various low power processors best fit
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Implementing the right audio/video transcoding scheme in consumer SoC
devices (Sep. 23, 2008)
In this "how we did it," Tim Simerly describes the factors TI engineers
took into account to accommodate the many encoding formats in a home
entertainment network when designing the DaVinci family of SoC
processors.
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Using static analysis to diagnose & prevent failures in
safety-critical device designs (Sep. 18,
2008)
David Kleidermacher reviews static analysis tools and their usefulness
in safety-critical embedded apps such as medical devices and systems,
and provides insight into using them effectively and assesses what
remains to be done to address future challenges.
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Speeding up the CORDIC algorithm with a DSP (Sep.
15, 2008)
When a CORDIC algorithm is implemented on a digital signal processor,
can the multipliers improve CORDIC performance?
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Dynamic reconfiguration is transforming the embedded world (Sep. 11, 2008)
The market has recently experienced an explosion in the number of
embedded devices pervading everyday life, from iPods and PDAs that
people carry to wireless presentation tools and digital organizers that
help one organize oneself better to wireless sensor networks deployed
for environment monitoring.
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Architecture-oriented C optimization, part 2: Memory and more (Sep. 04, 2008)
Here's how to optimize C to account for memory alignment, cache
features, endianness, and application specific instructions.
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Architecture-oriented C optimization, part 1: DSP features (Sep. 04, 2008)
Here's how C optimizations can take advantage of zero overhead loop
mechanisms, hardware saturation, modulo registers, and more.
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Bridging options enable FPGA-based configurable computing (Sep. 02, 2008)
As PCI Express continues to invade embedded systems, the history of
legacy PCI is repeating itself. The twist is that FPGAs have taken on
processing tasks within many embedded systems, augmenting or displacing
dedicated processors and DSPs.
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Extreme Design: Ultra-compact embedded computer overcomes multiple
design challenges (Sep. 02, 2008)
New generations of defense imaging systems, using sophisticated sensor
technologies, generate invaluable information for modern warfare.
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Multi-channel surveillance DVR design (Sep.
02, 2008)
How a video encoder can be designed to leverage the extra cycles
provided by hardware accelerators.
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Building a multi-voltage, high performance, ultra low standby power
32-bit MCU (Aug. 28, 2008)
In this "how we did it," Jean-Michel Gril-Maffre describes what
STMicroelectronics engineers did to enhance the performance of the ARM
Cortex-M3 core in its STM 32 MCUs and simultaneously lower power
consumption.
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Achieving cache coherence in a MIPS32 multicore design (Aug. 18, 2008)
Here's an example of how the Open Core Protocol was used to reconfigure
the basic MIPS32 architecture to support cache-coherent traffic within
an embedded multicore cluster.
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In-system programming of FLASH via control unit application (Aug. 18, 2008)
A high level of data integrity and data security is essential when
using FLASH memory in automotive control units. In order to
successfully implement FLASH solutions in this kind of environments it
takes to consider a set of basic rules.
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Microcontroller architectures, then and now (Aug.
11, 2008)
For a system designer looking to choose a microcontroller, the vast
array of available MCUs can make the search quite complex.
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Smart camera basics: Matching image sensor, analytics and processor
performance (Aug. 11, 2008)
Intelligent Network Cameras are an exciting new technology. This
article will help you understand the basics of intelligent network
cameras (or smart cameras), enabling technologies, and available design
tools.
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How to manage dynamic power in a microcontroller using its non-maskable
interrupt (Aug. 07, 2008)
This scheme allows MCUs to be made power-efficient and hence the
durability of standby coin battery cells can be increased to match the
product's life cycle.
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How to interface FPGAs to microcontrollers (Jul.
31, 2008)
Neither standard product microcontrollers nor FPGAs were developed to
communicate with each other efficiently, so interfacing the two can be
a challenge.
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Debugging with Cortex-M3 Microcontrollers (Jul.
22, 2008)
Reinhard Keil describes the Arm CoreSight technology and it can be
accessed by the software developer using the Vision Debugger and
explains the operating modes of the JTAG debug interface implemented on
Cortex-M3-based MCUs.
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Debugging multiprocessor code (Jul. 21,
2008)
Debugging code running on multiprocessor computing systems, and, in
particular, parallel code on multicore devices, is an old computing
problem that has reached a certain prominence and urgency because of
the profound transformation of hardware from single-processor to
multiprocessor and multicore solutions in the past few years.
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Use NAND Flash for cost, density and performance advantages for mobile
handsets (Jun. 30, 2008)
This NAND flash tutorial covers recent trends, alternatives and even
misconceptions regarding mobile handset storage subsystems that support
multimedia features.
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SoCs can hold key to system security (Jun.
24, 2008)
A system is only as secure as its weakest link, and security becomes
ever more important as more equipment moves to a system-on-chip
approach. Here we look at the security options available to SoC
designers.
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Floating-point emulation: faster than hardware? (Jun. 05, 2008)
Here's why emulation is faster than floating-point hardware, and how
Critical Link migrated from TI's floating-point C6711 to the
fixed-point C64x.
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20th Anniversary article: Full simulations with partial hardware (May. 12, 2008)
What do you do when the hardware team needs working software to check
out the system and the software team needs stable hardware to complete
their design work? Adding partially operational simulator hardware can
improve the effieciency and flexibility of your existing simulator or
emulator.
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An architecture for designing reusable embedded systems software, Part
2 (May. 05, 2008)
Want to make your application software more reusable? Don't change the
hardware, operating system, or your tools. Instead change the
architectural framework within which you do your design.
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Asynchronous DSPs: Low power, high performance (May. 05, 2008)
An asynchronous DSP offers better power, performance, and reliability
than one based on standard synchronous logic. It also enables simpler
and less expensive PCB and power supplies.
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The Relevance of System Design (May. 01,
2008)
Both hardware and software development must continue to address coming
system architecture challenges.
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An architecture for designing reusable embedded systems software, Part
1 (May. 01, 2008)
Want to make your application software more reusable? Don't change the
hardware, operating system, or your tools. Instead change the
architectural framework within which you do your design.
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Development and use of an Instruction Set Simulator of 68000-compatible
processor core (Apr. 24, 2008)
This paper presents an instruction set simulator of a 32-bit CPU and
explains its use in embedded software development. Interaction of the
ISS with transaction level model of a complex peripheral (Firewire™
link layer controller) is also discussed.
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Software-defined silicon: Why can't hardware be more like software?
(Apr. 15, 2008)
Why can't hardware be more like software? It can, even though next
generation multicore designs mix programmable logic, CPU blocks, and
dedicated logic. But it requires a new approach to architectural
design--software-defined silicon.
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Mobile video: ARM vs. DSP vs. hardware (Apr.
11, 2008)
This article compares fixed-function hardware, DSPs, and RISC
processors for video on handsets. It looks at power area, flexibility,
and other issues.
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