[linuxkernelnewbies] Memory System Performance 2002

[Peter Teoh]

http://moss.csc.ncsu.edu/~mueller/msp02/ ACM SIGPLAN Workshop on  Memory System Performance (MSP 2002) June 16, 2002 in conjunction with:  ACM SIGPLAN 2002 Conference on Programming Language Design and Implementation (PLDI 2001) Berlin, Germany, June 17-19, 2002 Important Dates:    Submissions: April 1, 2002    Notification: April 29, 2002    Final papers due: May 29, 2002 Given current technology trends that forecast a rapidly growing processor-memory speed imbalance, optimizing a program's memory system performance has become increasingly important. Much research has focused on improving the cache performance of scientific programs that use arrays as their primary data structure. Unfortunately, these techniques do not apply to general-purpose programs, which manipulate more complex and dynamic data structures. While recent research has begun to address this problem, much work remains to be done. The focus of this workshop is on all aspects of improving the memory system performance of general-purpose programs. This includes novel techniques for profiling memory system behavior, new analyses (both static and dynamic) for identifying and understanding memory-related performance problems, and finally optimizations for improving memory system performance. Software, hardware as well as hybrid approaches are encouraged. In addition, we solicit papers from application programmers that describe problems and experience with memory performance related issues in specific application domains. The workshop will bring together programming language researchers in the areas of program analysis and compiler optimization, computer architects, operating system researchers, and application programmers. We hope that this will be the first in a series of workshops that will encourage collaboration across these fields while at the same time expand program optimization research towards an area of great practical importance. Program MSP 2002 Program (subject to change) Sunday, June 16, 2002 08:00 - 08:45 Registration 08:45 - 09:00 Opening Remarks Special Session: 09:00 - 10:00 Invited Talk 09:00 - 10:00 The Influence of Replacement Strategy on Static Prediction of Cache Contents Reinhold Heckmann, AbsInt, Germany *** Break: 10:00 - 10:15*** Session 1: 10:15 - 12:45 Chair: Trishul Chilimbi 10:15-10:45 Compiler-Directed Run-Time Monitoring of Program Data Access Chen Ding, Yutao Zhong (U. of Rochester, USA) 10:45-11:15 Automatic Pool Allocation for Disjoint Data Structures Chris Lattner, Vikram Adve (U. of Illinois at Urbana-Champaign, USA) 11:15-11:45 Older-First Garbage Collection in Practice: Evaluation in a Java Virtual Machine Darko Stefanovic (U. of New Mexico), Matthew Hertz (U. of Massachusetts, USA), Stephen Blackburn (Australian National U., Australia), Kathryn McKinley (U. of Texas at Austin, USA), J. Eliot Moss (U. of Massachusetts, USA) 11:45-12:15 Calculating Stack Distances Efficiently George Almasi, Calin Cascaval, David Padua (U. of Illinois at Urbana-Champaign, USA) *** Lunch: 12:15 - 1:45*** Session 2: 1:45 - 3:15 Chair: Chen Ding 1:45-2:15 The Cache Behavior of Large Lazy Functional Programs on Stock Hardware Nicholas Nethercote, Alan Mycroft (Cambridge U., UK) 2:15-2:45 From Simulation to Practice: Cache Performance Study of a Prolog System Ricardo Lopes (Universidade do Porto), Luis F. Castro (State U. of New York, Stony Brook, USA), Vitor Santos Costa (U. of Wisconsin at Madison, USA) 2:45-3:15 Multi-objective Abstract Data Type Refinement for Mapping Tables in Telecom Network Applications Ch. Ykman-Couvreur, J. Lambrecht (IMEC, Belgium), A. van der Togt (Technical U., Delft), F. Catthoor (IMEC, Belgium) ***Coffee Break: 3:15 - 3:45*** Session 3: 3:45 - 5:15 Chair: Frank Mueller 3:45-4:15 A Proposal for a New Hardware Cache Monitoring Architecture Martin Schulz, Jie Tao, Juergen Jeitner, Wolfgang Karl (Institut fur Informatik der Tecnischen Universitat, Munchen, Germany) 4:15-4:45 The Performance Advantage of Applying Compression to the Memory System Nihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan (State U. of New York, Buffalo, USA) 4:45-5:15 An Efficient Static Analysis Algorithm to Detect Redundant Memory Operations Keith D. Cooper, Li Xu (Rice U., USA) Registration and Hotel Registration is handled through the PLDI 2002 registration site, which is now available here. (You will be given the option of registering just for MSP, in spite of the fact that it is labelled as the PLDI registration site.) Registration fees will be between $115 and $125 depending on your ACM and SIGPLAN membership status. The conference will take place in the Crowne Plaza Berlin City Centre Hotel. Hotel and local travel information are now available on the corresponding PLDI page. Please mention both ACM and PLDI when you register for the hotel, even if you are attending just MSP. It appears that you must register by phone (++49-30-21 007 0, European daytime hours preferred), fax (++49-30-21 32 009, .pdf, .ps form), or email (i...@cp-berlin.com) in order to take advantage of the PLDI/MSP room block and rates (156 EUR single, 186 EUR double). General Chair: Frank Mueller   Program Chair: Trishul Chilimbi   Finance & Publicity Chair: Chen Ding NC State University Microsoft Research University of Rochester Program Committee Brad Calder University of California, San Diego Jim Larus Microsoft Research Sid Chatterjee IBM Chi-Keung Luk Intel Trishul Chilimbi Microsoft Research Kathryn McKinley University of Texas, Austin Chen Ding University of Rochester Todd Mowry Carnegie Mellon University Rajiv Gupta University of Arizona Frank Mueller NC State University Mark Hill University of Wisconsin, Madison Jignesh Patel University of Michgan Roy Ju Intel Mark Wegman IBM Reinhard Wilhelm University of Saarland, Germany