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http://de.scientificcommons.org/josef_weidendorfer Cache Optimizations for Iterative Numerical Codes Aware of Hardware Prefetching (2008) Josef Weidendorfer, Carsten Trinitis Abstract. Cache optimizations use code transformations to increase the locality of memory accesses and use prefetching techniques to hide latency. For best performance, hardware prefetching units of... Latencies of Conflicting Writes on Contemporary Multicore Architectures (2008) Josef Weidendorfer, Michael Ott, Tobias Klug, Carsten Trinitis Abstract. This paper provides a detailed investigation of latency penalties caused by repeated memory writes to nearby memory cells from different threads in parallel programs. When such writes map... Collecting and Exploiting Cache-Reuse Metrics (2008) Josef Weidendorfer, Carsten Trinitis Abstract. The increasing gap of processor and main memory performance underlines the need for cache-optimizations, especially on memoryintensive applications. Tools which are able to localize code... Latencies of Conflicting Writes on Contemporary Multicore Architectures (2008) Josef Weidendorfer, Michael Ott, Tobias Klug, Carsten Trinitis Abstract. This paper provides a detailed investigation of latency penalties caused by repeated memory writes to nearby memory cells from different threads in parallel programs. When such writes map... Cache optimizations for iterative numerical codes aware of hardware prefetching (2006) Josef Weidendorfer, Carsten Trinitis Abstract. Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefetching... A Data Structure Oriented Monitoring Environment for Fortran OpenMP Programs (2004) Edmond Kereku, Tianchao Li, Michael Gerndt, Josef Weidendorfer Abstract. This paper describes a monitoring environment that enables the analysis of memory access behavior of applications in a selective way with a potentially very high degree of detail. It is... Cache simulation based on runtime instrumentation for OpenMP applications (2004) To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow research for... A Tool Suite for Simulation Based Analysis of Memory Access Behavior (2004) Josef Weidendorfer, Markus Kowarschik, Carsten Trinitis Abstract. In this paper, two tools are presented: an execution driven cache simulator which relates event metrics to a dynamically built-up call-graph, and a graphical front end able to visualize the... Zugl.: München, Techn. Universiẗat, Diss., 2003. Fast Communication Libraries on an SCI Cluster (1998) Michael Eberl, Hermann Hellwagner, Wolfgang Karl, Markus Leberecht, Josef Weidendorfer Abstract--- In this paper, we describe three fast communication libraries that we have developed for a cluster with an SCI interconnect: (1) an implementation of Active Messages; (2) a library which... |
