[linuxkernelnewbies] Input/Output Base Address - Wikipedia, the free encyclopedia

[peter teoh]

http://en.wikipedia.org/wiki/Input/Output_Base_Address Input/Output Base Address From Wikipedia, the free encyclopedia Jump to: navigation, search In x86 architecture, an input/output base address is a base address of an I/O port. In other words, this is the first address of a range of consecutive I/O port addresses that device uses. Contents [hide] 1 Common I/O Base Address Device Assignments in IBM PC compatible computers 2 See also 3 References 4 External links [edit] Common I/O Base Address Device Assignments in IBM PC compatible computers This table represents the common I/O address ranges for device assignments in IBM PC compatible computers. The base address is the first in each range. Each row of the table represents a device or chip within the computer system. For example, the address status port in the LPT device is 0x0001, adding the base address of LPT1 (0x0378) results in the address of the LPT1 status port being 0x0379. When there are two or more identical devices in a computer system, each device would be mapped to a different base address (e.g. LPT1 and LPT2 for printers). I/O address range Device 00 - 1f First DMA controller 8237 A-5 20 - 3f First Programmable Interrupt Controller, 8259A, Master 40 - 5f Programmable Interval Timer (System Timer), 8254 60 - 6f Keyboard, 8042 70 - 7f Real Time Clock, NMI mask 80 - 9f DMA Page Register, 74LS612 87 DMA Channel 0 83 DMA Channel 1 81 DMA Channel 2 82 DMA Channel 3 8b DMA Channel 5 89 DMA Channel 6 8a DMA Channel 7 8f Refresh a0 - bf Second Programmable Interrupt Controller, 8259A, Slave c0 - df Second DMA controller 8237 A-5 f0 Clear 80287 Busy f1 Reset 80287 f8 - ff Math coprocessor, 80287 0f0 - 0f5 PCjr Disk Controller 0f8 - 0ff Reserved for future microprocessor extensions 100 - 10f POS Programmable Option Select (PS/2) 110 - 1ef System I/O channel 140 - 15f Secondary SCSI host adapter 170 - 177 Secondary Parallel ATA Disk Controller 1f0 - 1f7 Primary Parallel ATA Hard Disk Controller 200 - 20f Game port 210 - 217 Expansion Unit 220 - 233 Sound Blaster and most other sound cards 278 - 27f LPT2 parallel port 280 - 29f LCD on Wyse 2108 PC SMC Elite default factory setting 2b0 - 2df Alternate Enhanced Graphics Adapter (EGA) display control 2e8 - 2ef COM4 serial port 2e1 GPIB/IEEE-488 Adapter 0 2f8 - 2ff COM2 serial port 2e2 - 2e3 Data acquisition 300 - 31f Prototype Card 300 - 31f Novell NE1000 compatible Ethernet network interfaces 300 - 31f AMD Am7990 Ethernet network interface, irq=5. 320 - 323 ST-506 and compatible hard disk drive interface 330 - 331 MPU-401 UART on most sound cards 340 - 35f Primary SCSI host adapter 370 - 377 Secondary floppy disk drive controller 378 - 37f LPT1 parallel port 380 - 38c Secondary Binary Synchronous Data Link Control (SDLC) adapter 388 - 389 AdLib Music Synthesizer Card 3a0 - 3a9 Primary Binary Synchronous Data Link Control (SDLC) adapter 3b0 - 3bb Monochrome Display Adapter (MDA) display control 3bc - 3bf MDA LPT parallel port 3c0 - 3cf Enhanced Graphics Adapter (EGA) display control 3d0 - 3df Color Graphics Adapter (CGA) 3e8 - 3ef COM3 serial port 3f0 - 3f7 Primary floppy disk drive controller. Primary IDE controller (slave drive) (3F6-3F7h) 3f8 - 3ff COM1 serial port Note: For many devices listed above the assignments can be changed via jumpers, DIP switches, or Plug-And-Play software. [edit] See also IRQ - interrupt request [edit] References HelpPC Quick Reference Utility by David Jurgens [edit] External links Base address term definition from Webopedia Introduction to IRQs, DMAs and Base Addresses Copyright © 1999, Eugene Blanchard, Published in Issue 38 of Linux Gazette, March 1999 The PC Guide Apogee FAQ at RinkWorks Programming the AdLib/Sound Blaster FM Music Chips I/O Ports and Controllers on IBM Compatibles and PS/2 at OS/2 Site Australia This computer-related article is a stub. You can help Wikipedia by expanding it.