http://www.hotchips.org/archives/hc21/
HOT CHIPS 21 Archives (2009)
General Information
| HOT CHIPS 21 (2009) |
| Date |
August 23-25, 2009 |
| Place |
Memorial Auditorium, Stanford University |
| Committees |
HC 21 Committees and Sponsors  |
Tutorials
Conference Day One
| Session |
Monday, August 24, 2009 |
| Session 1 |
Session One: Server Systems I
Session Chair: Christos Kozyrakis, Stanford
Presentations:
- Blade Computing with the AMD Opeteron™ Processor ("Magny
Cours"): Pat Conway, AMD
- Nehalem-EX CPU Architecture: Sailesh Kottapalli and Jeff
Baxter, Intel
- Innovation Envelope: Hot Chips in Blades: Kevin Leigh, HP
|
| Keynote 1 |
Keynote I
Keynote Chair: John Nickolls, NVIDIA
Presentation: The GPU Computing Tipping
Point
Jen-Hsun Huang, CEO, NVIDIA
|
| Session 2 |
Session Two: I/O
Session Chair: Norm Jouppi, HP
Presentations:
- The World's First USB3.0 Storage Controller
Author(s): Gideon Intrater, Symwave
- 40Gb/s Optical Active Cable Using Monolithic Transceivers
Implemented in Silicon Photonics Enabled 0.13-µm SOI CMOS Technology
Author(s): Daniel Kucharski,
Sherif Abdalla, Behnam Analui, Colin Bradbury, Peter De Dobbelaere,
Dennis Foltz, Steffen Gloeckner, Drew Guckenberger, Mark Harrison,
Steve Jackson, Michael Mack, Gianlorenzo Masini, Attila Mekis, Adit
Narasimha, Mark Peterson, Thierry Pinguet, Subal Sahni, Will Wang,
Brian Welch and Jeremy Witzens , Luxtera
- Intel® 5520 Chipset: An I/O Hub Chipset for Server,
Workstation, and High End Desktop
Author(s): Debendra Das Sharma, Intel
|
| Session 3 |
Session Three: Parallel Computing Centers
Session Chair: Dean Tullsen, UC
San Diego and Alan Jay Smith, UC Berkeley
Presentations:
- Overview of the UC Berkeley Par Lab
Author(s): David Patterson, UC
Berkeley
- Universal Parallel Computing Research Center at Illinois:
Making Parallel Programming Synonymous with Programming
Author(s): Sarita Adve, Vikram
Adve, Gul Agha, Maria Garzaran, John Hart, Wen-mei Hwu, Ralph Johnson,
Laxmikant Kale, Darko Marinov, Klara Nahrstedt, David Padua, Madhusudan
Parthasarathy, Sanjay Patel, Grigore Rosu, Dan Roth, Marc Snir, Josep
Torrellas and Craig Zilles , UIUC
- The Stanford Pervasive Parallelism Laboratory (PPL)
Author(s): Kunle Olukotun, Alex
Aiken, Bill Dally, Ron Fedkiw, Pat Hanrahan, John Hennessy, Mark
Horowitz, Vladlen Koltun, Christos Kozyrakis, Mendel Rosenblum and
Sebastian Thrun, Stanford University
|
| Session 4 |
Session Four: Client Processors
Session Chair: Jan-Willem van de Waerdt, NXP
Presentations:
- Moorestown
Platform: Based on Lincroft SoC Designed for Next Generation
Smartphones
Author(s): Rajesh Patel, Intel
- OMAP4430
Architecture and Development
Author(s): David Witt, TI
- ION: A
single-chip platform that energizes balanced PC architectures
Author(s): Sridhar Pursai, NVIDIA
- Tranisitioning the Intel® Next Generation Microarchitectures
(Nehalem and Westmere) Into the Mainstream
Author(s): Stephan
Jourdan, Intel
|
| Panel Discussion |
Panel Discussion: Technology Scaling at an Inflection
Point: What next?
Moderator: Krste Asanovic (UC Berkeley)
Panelists:
- Mark Horowitz (Stanford)
- Brad McCredie (IBM Fellow and VP)
- Michael Hart (Xilinx - Senior Director
Semiconductor Technology Development)
- David Witt (Head of OMAP Development at TI)
- Lode Lauwers (IMEC Institute Senior
Director Business and Partner Relations)
|
Conference Day Two
| Session |
Tuesday, August 25, 2009 |
| Session 5 |
Session Five: Computing Accelerators
Session Chair: Bevan Baas, UC Davis
Presentations:
- SPARC64(TM) VIIIfx: Fujitsu's New Generation Octo Core
Processor for PETA Scale Computing
Author(s): Takumi Maruyama,
Fujitsu
- Instruction Set Innovations for Convey's HC-1 Computer
Author(s): Tony Brewer, Convey
Computer
- Programming the Nallatech Xeon + Multi-FPGA Heterogeneous
Platform
Author(s): Allan Cantle, Paul
Chow, Chris Madill, Manuel Saldana and Arun Patel, Nallatech and ArchES
Computing
- Xeon Socket Filler FPGA Accelerators
- Sun's 3rd generation on-chip UltraSPARC security
accelerator
Author(s): Lawrence Spracklen,
Sun
|
| Keynote II |
Keynote Chair: Pradeep Dubey, Intel
Presentation: Let's Get Small: How
computers are making a big difference in the Games Business
Rich Hilleman, Chief Creative Officer (CCO), Electronic
Arts (EA)
|
| Session 6 |
Session Six: SoCs + Clocking
Session Chair: Forest Baskett, NEA
Presentation:
- PNX85500 - Single Chip LCD TV System with integrated 120Hz
HD Frame Rate Converter
Authors: Ralf Karge, NXP; Colin
Osborne, NXP
- IMAPCAR2: A Dynamic SIMD/MIMD Mode Switching Processor for
Embedded Systems
Author(s): Shorin Kyo, Shohei
Nomoto, Takuya Koga, Hanno Lieske and Shin'ichiro Okazaki, NEC
- SOC for Car Navigation Systems with a 53.3 GOPS Image
Recognition Engine
Author(s): Hideaki Kido, Shoji
Muramatsu, Yasuhiko Hoshi, Hiroyuki Hamasaki, Atsushi Nakamura and
Akihiro Yamamoto, Hitachi
- Silicon MEMS Oscillators for High Speed Digital Systems
Author(s): Aaron Partridge,
SiTime
|
| Session 7 |
Session Seven: FPGAs
Session Chair: Chuck Thacker, Microsoft
Presentations:
- Ultra Low Power FPGAs Fuel Faster Feature Evolution in
Mobile Applications
Authors(s): John
Birkner, SiliconBlue
- Newest Additions to Altera's Integrated Transceiver
Portfolio
Authors(s): Dan
Mansur, Altera
- Xilinix Virtex-6 and Spartan-6 FPGA Families
Authors(s): Peter
Alfke , Xilinx
|
| Session 8 |
Session Eight: Server Systems II
Session Chair: Jose Renau, UC
Santa Cruz
Presentations:
- Sun's Next-Generation Multi-threaded Processor - Rainbow
Falls: Sun's Next Generation CMT Processor
Authors(s):
Sanjay Patel, Stephen Phillips and Allan Strong, Sun
- POWER7: IBM's Next Generation POWER Microprocessor
Authors(s): Ron
Kalla, IBM
- POWER7: IBM's Next Generation Balanced POWER Server Chip
Authors(s): William
Starke, IBM
|
| |
Closing Remarks |
Video
Morning Tutorials (Flash)
Keynote 1 (Flash)
Panel Discussion (Flash)
|
